Search

Marwan Ayash

Examiner (ID: 16933, Phone: (571)270-1179 , Office: P/2133 )

Most Active Art Unit
2133
Art Unit(s)
2133, 2185
Total Applications
421
Issued Applications
278
Pending Applications
27
Abandoned Applications
126

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6362547 [patent_doc_number] => 20100332771 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-30 [patent_title] => 'PRIVATE MEMORY REGIONS AND COHERENCE OPTIMIZATIONS' [patent_app_type] => utility [patent_app_number] => 12/493164 [patent_app_country] => US [patent_app_date] => 2009-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6967 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0332/20100332771.pdf [firstpage_image] =>[orig_patent_app_number] => 12493164 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/493164
Private memory regions and coherence optimizations Jun 25, 2009 Issued
Array ( [id] => 9555582 [patent_doc_number] => 08762654 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-06-24 [patent_title] => 'Selectively scheduling memory accesses in parallel based on access speeds of memory' [patent_app_type] => utility [patent_app_number] => 12/484284 [patent_app_country] => US [patent_app_date] => 2009-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7468 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 311 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12484284 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/484284
Selectively scheduling memory accesses in parallel based on access speeds of memory Jun 14, 2009 Issued
Array ( [id] => 5571321 [patent_doc_number] => 20090254700 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-08 [patent_title] => 'DRAM CONTROLLER FOR GRAPHICS PROCESSING OPERABLE TO ENABLE/DISABLE BURST TRANSFER' [patent_app_type] => utility [patent_app_number] => 12/484673 [patent_app_country] => US [patent_app_date] => 2009-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 7307 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0254/20090254700.pdf [firstpage_image] =>[orig_patent_app_number] => 12484673 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/484673
DRAM CONTROLLER FOR GRAPHICS PROCESSING OPERABLE TO ENABLE/DISABLE BURST TRANSFER Jun 14, 2009 Abandoned
Array ( [id] => 5516669 [patent_doc_number] => 20090216976 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-27 [patent_title] => 'COMPUTER SYSTEM ALLOWING ANY COMPUTER TO COPY ANY STORAGE AREA WITHIN A STORAGE SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/431385 [patent_app_country] => US [patent_app_date] => 2009-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7909 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0216/20090216976.pdf [firstpage_image] =>[orig_patent_app_number] => 12431385 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/431385
COMPUTER SYSTEM ALLOWING ANY COMPUTER TO COPY ANY STORAGE AREA WITHIN A STORAGE SYSTEM Apr 27, 2009 Abandoned
Array ( [id] => 8235455 [patent_doc_number] => 08200916 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-12 [patent_title] => 'Write set boundary management in support of asynchronous update of secondary storage' [patent_app_type] => utility [patent_app_number] => 12/361504 [patent_app_country] => US [patent_app_date] => 2009-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2318 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 293 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/200/08200916.pdf [firstpage_image] =>[orig_patent_app_number] => 12361504 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/361504
Write set boundary management in support of asynchronous update of secondary storage Jan 27, 2009 Issued
Array ( [id] => 6593018 [patent_doc_number] => 20100274948 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-28 [patent_title] => 'COPY-PROTECTED SOFTWARE CARTRIDGE' [patent_app_type] => utility [patent_app_number] => 12/735005 [patent_app_country] => US [patent_app_date] => 2008-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2608 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0274/20100274948.pdf [firstpage_image] =>[orig_patent_app_number] => 12735005 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/735005
COPY-PROTECTED SOFTWARE CARTRIDGE Dec 11, 2008 Abandoned
Array ( [id] => 9486445 [patent_doc_number] => 08732407 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-20 [patent_title] => 'Deadlock avoidance during store-mark acquisition' [patent_app_type] => utility [patent_app_number] => 12/273697 [patent_app_country] => US [patent_app_date] => 2008-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 5576 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12273697 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/273697
Deadlock avoidance during store-mark acquisition Nov 18, 2008 Issued
Array ( [id] => 5356382 [patent_doc_number] => 20090187726 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-23 [patent_title] => 'Alternate Address Space to Permit Virtual Machine Monitor Access to Guest Virtual Address Space' [patent_app_type] => utility [patent_app_number] => 12/272946 [patent_app_country] => US [patent_app_date] => 2008-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 16545 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0187/20090187726.pdf [firstpage_image] =>[orig_patent_app_number] => 12272946 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/272946
Alternate Address Space to Permit Virtual Machine Monitor Access to Guest Virtual Address Space Nov 17, 2008 Abandoned
Array ( [id] => 5417939 [patent_doc_number] => 20090043826 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-12 [patent_title] => 'Method for Reliably Updating A Data Group In A Read-Before-Write Data Replication Environment Using A Comparison File' [patent_app_type] => utility [patent_app_number] => 12/261972 [patent_app_country] => US [patent_app_date] => 2008-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5670 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0043/20090043826.pdf [firstpage_image] =>[orig_patent_app_number] => 12261972 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/261972
Method for reliably updating a data group in a read-before-write data replication environment using a comparison file Oct 29, 2008 Issued
Array ( [id] => 6240903 [patent_doc_number] => 20100268908 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-21 [patent_title] => 'DATA STORAGE METHOD, DEVICE AND SYSTEM AND MANAGEMENT SERVER' [patent_app_type] => utility [patent_app_number] => 12/741406 [patent_app_country] => US [patent_app_date] => 2008-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10929 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0268/20100268908.pdf [firstpage_image] =>[orig_patent_app_number] => 12741406 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/741406
DATA STORAGE METHOD, DEVICE AND SYSTEM AND MANAGEMENT SERVER Sep 27, 2008 Abandoned
Array ( [id] => 14063463 [patent_doc_number] => 10236032 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-19 [patent_title] => Mass data storage system with non-volatile memory modules [patent_app_type] => utility [patent_app_number] => 12/212902 [patent_app_country] => US [patent_app_date] => 2008-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 19 [patent_no_of_words] => 10517 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 388 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12212902 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/212902
Mass data storage system with non-volatile memory modules Sep 17, 2008 Issued
Array ( [id] => 6227558 [patent_doc_number] => 20100058018 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-04 [patent_title] => 'Memory Scheduler for Managing Internal Memory Operations' [patent_app_type] => utility [patent_app_number] => 12/202581 [patent_app_country] => US [patent_app_date] => 2008-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9987 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0058/20100058018.pdf [firstpage_image] =>[orig_patent_app_number] => 12202581 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/202581
Memory scheduler for managing maintenance operations in a resistive memory in response to a trigger condition Sep 1, 2008 Issued
Array ( [id] => 6217051 [patent_doc_number] => 20100052729 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-04 [patent_title] => 'DIGITAL DATA INVERSION FLAG GENERATOR CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/201876 [patent_app_country] => US [patent_app_date] => 2008-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6801 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0052/20100052729.pdf [firstpage_image] =>[orig_patent_app_number] => 12201876 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/201876
Digital data inversion flag generator circuit Aug 28, 2008 Issued
Array ( [id] => 6227458 [patent_doc_number] => 20100057985 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-04 [patent_title] => 'SYSTEM AND METHOD FOR ALLOCATING PERFORMANCE TO DATA VOLUMES ON DATA STORAGE SYSTEMS AND CONTROLLING PERFORMANCE OF DATA VOLUMES' [patent_app_type] => utility [patent_app_number] => 12/199758 [patent_app_country] => US [patent_app_date] => 2008-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 11968 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0057/20100057985.pdf [firstpage_image] =>[orig_patent_app_number] => 12199758 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/199758
SYSTEM AND METHOD FOR ALLOCATING PERFORMANCE TO DATA VOLUMES ON DATA STORAGE SYSTEMS AND CONTROLLING PERFORMANCE OF DATA VOLUMES Aug 26, 2008 Abandoned
Array ( [id] => 6227530 [patent_doc_number] => 20100058016 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-04 [patent_title] => 'METHOD, APPARATUS AND SOFTWARE PRODUCT FOR MULTI-CHANNEL MEMORY SANDBOX' [patent_app_type] => utility [patent_app_number] => 12/198839 [patent_app_country] => US [patent_app_date] => 2008-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5536 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0058/20100058016.pdf [firstpage_image] =>[orig_patent_app_number] => 12198839 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/198839
METHOD, APPARATUS AND SOFTWARE PRODUCT FOR MULTI-CHANNEL MEMORY SANDBOX Aug 25, 2008 Abandoned
Array ( [id] => 5430177 [patent_doc_number] => 20090089487 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-02 [patent_title] => 'MULTIPORT SEMICONDUCTOR MEMORY DEVICE HAVING PROTOCOL-DEFINED AREA AND METHOD OF ACCESSING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/197472 [patent_app_country] => US [patent_app_date] => 2008-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8472 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0089/20090089487.pdf [firstpage_image] =>[orig_patent_app_number] => 12197472 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/197472
MULTIPORT SEMICONDUCTOR MEMORY DEVICE HAVING PROTOCOL-DEFINED AREA AND METHOD OF ACCESSING THE SAME Aug 24, 2008 Abandoned
Array ( [id] => 6616792 [patent_doc_number] => 20100049939 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-25 [patent_title] => 'METHOD FOR ADDRESS COMPARISON AND A DEVICE HAVING ADDRESS COMPARISON CAPABILITIES' [patent_app_type] => utility [patent_app_number] => 12/194273 [patent_app_country] => US [patent_app_date] => 2008-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4007 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0049/20100049939.pdf [firstpage_image] =>[orig_patent_app_number] => 12194273 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/194273
Method for address comparison and a device having address comparison capabilities Aug 18, 2008 Issued
Array ( [id] => 5311970 [patent_doc_number] => 20090019251 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-15 [patent_title] => 'DYNAMIC STORAGE POOLS WITH THIN PROVISIONING' [patent_app_type] => utility [patent_app_number] => 12/192239 [patent_app_country] => US [patent_app_date] => 2008-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 11801 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0019/20090019251.pdf [firstpage_image] =>[orig_patent_app_number] => 12192239 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/192239
Transferring storage resources between snapshot storage pools and volume storage pools in a data storage system Aug 14, 2008 Issued
Array ( [id] => 5273562 [patent_doc_number] => 20090077338 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-19 [patent_title] => 'Apparatus and Method for Managing Storage Systems' [patent_app_type] => utility [patent_app_number] => 12/190043 [patent_app_country] => US [patent_app_date] => 2008-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2945 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0077/20090077338.pdf [firstpage_image] =>[orig_patent_app_number] => 12190043 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/190043
Apparatus and Method for Managing Storage Systems Aug 11, 2008 Abandoned
Array ( [id] => 5448028 [patent_doc_number] => 20090049254 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-19 [patent_title] => 'MEMORY CONTROLLER AND PROCESSOR SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/184553 [patent_app_country] => US [patent_app_date] => 2008-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 5647 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0049/20090049254.pdf [firstpage_image] =>[orig_patent_app_number] => 12184553 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/184553
MEMORY CONTROLLER AND PROCESSOR SYSTEM Jul 31, 2008 Abandoned
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