Search

Marwan Ayash

Examiner (ID: 4231, Phone: (571)270-1179 , Office: P/2133 )

Most Active Art Unit
2133
Art Unit(s)
2133, 2185
Total Applications
421
Issued Applications
278
Pending Applications
27
Abandoned Applications
126

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 12688555 [patent_doc_number] => 20180121351 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-03 [patent_title] => STORAGE SYSTEM, STORAGE MANAGEMENT APPARATUS, STORAGE DEVICE, HYBRID STORAGE APPARATUS, AND STORAGE MANAGEMENT METHOD [patent_app_type] => utility [patent_app_number] => 15/853874 [patent_app_country] => US [patent_app_date] => 2017-12-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15889 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15853874 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/853874
STORAGE SYSTEM, STORAGE MANAGEMENT APPARATUS, STORAGE DEVICE, HYBRID STORAGE APPARATUS, AND STORAGE MANAGEMENT METHOD Dec 24, 2017 Abandoned
Array ( [id] => 16879969 [patent_doc_number] => 11030118 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-08 [patent_title] => Data-locking memory module [patent_app_type] => utility [patent_app_number] => 15/849507 [patent_app_country] => US [patent_app_date] => 2017-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 5157 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15849507 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/849507
Data-locking memory module Dec 19, 2017 Issued
Array ( [id] => 16171479 [patent_doc_number] => 10713046 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-14 [patent_title] => System memory controller with atomic operations [patent_app_type] => utility [patent_app_number] => 15/849537 [patent_app_country] => US [patent_app_date] => 2017-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2730 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 281 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15849537 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/849537
System memory controller with atomic operations Dec 19, 2017 Issued
Array ( [id] => 13905851 [patent_doc_number] => 20190042130 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-07 [patent_title] => PREFIX OPCODE METHOD FOR SLC ENTRY WITH AUTO-EXIT OPTION [patent_app_type] => utility [patent_app_number] => 15/845596 [patent_app_country] => US [patent_app_date] => 2017-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7751 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15845596 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/845596
PREFIX OPCODE METHOD FOR SLC ENTRY WITH AUTO-EXIT OPTION Dec 17, 2017 Abandoned
Array ( [id] => 12668230 [patent_doc_number] => 20180114576 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-26 [patent_title] => MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 15/839976 [patent_app_country] => US [patent_app_date] => 2017-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4793 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15839976 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/839976
Responder signal circuitry for memory arrays finding at least one cell with a predefined value Dec 12, 2017 Issued
Array ( [id] => 17106329 [patent_doc_number] => 11126546 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-21 [patent_title] => Garbage data scrubbing method, and device [patent_app_type] => utility [patent_app_number] => 16/754537 [patent_app_country] => US [patent_app_date] => 2017-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 19417 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16754537 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/754537
Garbage data scrubbing method, and device Oct 12, 2017 Issued
Array ( [id] => 16551781 [patent_doc_number] => 10884941 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-05 [patent_title] => Techniques to store data for critical chunk operations [patent_app_type] => utility [patent_app_number] => 15/720027 [patent_app_country] => US [patent_app_date] => 2017-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 9072 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15720027 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/720027
Techniques to store data for critical chunk operations Sep 28, 2017 Issued
Array ( [id] => 16200746 [patent_doc_number] => 10725909 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-28 [patent_title] => Memory device controlling including reading from a first memory and writing to a second memory based on timing and control signals [patent_app_type] => utility [patent_app_number] => 15/687910 [patent_app_country] => US [patent_app_date] => 2017-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 9802 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 412 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15687910 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/687910
Memory device controlling including reading from a first memory and writing to a second memory based on timing and control signals Aug 27, 2017 Issued
Array ( [id] => 15231839 [patent_doc_number] => 10503642 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-10 [patent_title] => Cache coherence directory architecture with decoupled tag array and data array [patent_app_type] => utility [patent_app_number] => 15/686846 [patent_app_country] => US [patent_app_date] => 2017-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3745 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15686846 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/686846
Cache coherence directory architecture with decoupled tag array and data array Aug 24, 2017 Issued
Array ( [id] => 13875545 [patent_doc_number] => 20190034113 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-31 [patent_title] => SYSTEMS AND METHODS FOR PROVIDING CUSTOMER SERVICE FUNCTIONALITY DURING PORTFOLIO MIGRATION DOWNTIME [patent_app_type] => utility [patent_app_number] => 15/665047 [patent_app_country] => US [patent_app_date] => 2017-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10693 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15665047 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/665047
Systems and methods for providing customer service functionality during portfolio migration downtime Jul 30, 2017 Issued
Array ( [id] => 11938607 [patent_doc_number] => 20170242757 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-24 [patent_title] => 'SYSTEMS AND METHODS FOR RESTORING DATA FROM NETWORK ATTACHED STORAGE' [patent_app_type] => utility [patent_app_number] => 15/589662 [patent_app_country] => US [patent_app_date] => 2017-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8020 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15589662 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/589662
SYSTEMS AND METHODS FOR RESTORING DATA FROM NETWORK ATTACHED STORAGE May 7, 2017 Abandoned
Array ( [id] => 16607816 [patent_doc_number] => 10908818 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-02-02 [patent_title] => Accessing deduplicated data from write-evict units in solid-state memory cache [patent_app_type] => utility [patent_app_number] => 15/488977 [patent_app_country] => US [patent_app_date] => 2017-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 20 [patent_no_of_words] => 13222 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 352 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15488977 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/488977
Accessing deduplicated data from write-evict units in solid-state memory cache Apr 16, 2017 Issued
Array ( [id] => 15609055 [patent_doc_number] => 10585587 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-10 [patent_title] => Memory control circuitry, memory system and processor system [patent_app_type] => utility [patent_app_number] => 15/455261 [patent_app_country] => US [patent_app_date] => 2017-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 7858 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 252 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15455261 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/455261
Memory control circuitry, memory system and processor system Mar 9, 2017 Issued
Array ( [id] => 12262397 [patent_doc_number] => 20180081593 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-22 [patent_title] => 'MEMORY SYSTEM AND PROCESSOR SYSTEM' [patent_app_type] => utility [patent_app_number] => 15/455387 [patent_app_country] => US [patent_app_date] => 2017-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4764 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15455387 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/455387
Controlling write pulse width to non-volatile memory based on free space of a storage Mar 9, 2017 Issued
Array ( [id] => 14886987 [patent_doc_number] => 10423536 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-24 [patent_title] => Memory system with plural nonvolatile memories having different access sizes, different speeds using address conversion information to access one memory by converting an address to access another memory [patent_app_type] => utility [patent_app_number] => 15/455483 [patent_app_country] => US [patent_app_date] => 2017-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4066 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15455483 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/455483
Memory system with plural nonvolatile memories having different access sizes, different speeds using address conversion information to access one memory by converting an address to access another memory Mar 9, 2017 Issued
Array ( [id] => 15516573 [patent_doc_number] => 10564871 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-18 [patent_title] => Memory system having multiple different type memories with various data granularities [patent_app_type] => utility [patent_app_number] => 15/453248 [patent_app_country] => US [patent_app_date] => 2017-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 18 [patent_no_of_words] => 7940 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15453248 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/453248
Memory system having multiple different type memories with various data granularities Mar 7, 2017 Issued
Array ( [id] => 17151402 [patent_doc_number] => 11144480 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-12 [patent_title] => Atomic instruction having a local scope limited to an intermediate cache level [patent_app_type] => utility [patent_app_number] => 15/452073 [patent_app_country] => US [patent_app_date] => 2017-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3612 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15452073 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/452073
Atomic instruction having a local scope limited to an intermediate cache level Mar 6, 2017 Issued
Array ( [id] => 15375297 [patent_doc_number] => 10529374 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-01-07 [patent_title] => SMR-HDD media cache copy transfer [patent_app_type] => utility [patent_app_number] => 15/452507 [patent_app_country] => US [patent_app_date] => 2017-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 6469 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15452507 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/452507
SMR-HDD media cache copy transfer Mar 6, 2017 Issued
Array ( [id] => 13029427 [patent_doc_number] => 10037334 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-07-31 [patent_title] => Memory management and sharing host OS files for Virtual Machines using execution-in-place [patent_app_type] => utility [patent_app_number] => 15/390589 [patent_app_country] => US [patent_app_date] => 2016-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5349 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15390589 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/390589
Memory management and sharing host OS files for Virtual Machines using execution-in-place Dec 25, 2016 Issued
Array ( [id] => 11868398 [patent_doc_number] => 20170235683 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-17 [patent_title] => 'AUTHENTICATION METHOD, AUTHENTICATION PROGRAM MEDIUM, AND INFORMATION PROCESSING APPARATUS' [patent_app_type] => utility [patent_app_number] => 15/384845 [patent_app_country] => US [patent_app_date] => 2016-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6112 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15384845 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/384845
AUTHENTICATION METHOD, AUTHENTICATION PROGRAM MEDIUM, AND INFORMATION PROCESSING APPARATUS Dec 19, 2016 Abandoned
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