Search

Mary Ann Calabrese

Examiner (ID: 18530, Phone: (571)272-8704 , Office: P/2913 )

Most Active Art Unit
2913
Art Unit(s)
2931, 2913
Total Applications
4141
Issued Applications
3855
Pending Applications
21
Abandoned Applications
276

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 132582 [patent_doc_number] => 07696039 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-04-13 [patent_title] => 'Method of fabricating semiconductor device employing selectivity poly deposition' [patent_app_type] => utility [patent_app_number] => 11/809734 [patent_app_country] => US [patent_app_date] => 2007-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1773 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/696/07696039.pdf [firstpage_image] =>[orig_patent_app_number] => 11809734 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/809734
Method of fabricating semiconductor device employing selectivity poly deposition May 30, 2007 Issued
Array ( [id] => 6293147 [patent_doc_number] => 20100159677 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-24 [patent_title] => 'SOLID-PHASE SHEET GROWING SUBSTRATE AND METHOD OF MANUFACTURING SOLID-PHASE SHEET' [patent_app_type] => utility [patent_app_number] => 12/303811 [patent_app_country] => US [patent_app_date] => 2007-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8150 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0159/20100159677.pdf [firstpage_image] =>[orig_patent_app_number] => 12303811 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/303811
Solid-phase sheet growing substrate and method of manufacturing solid-phase sheet May 23, 2007 Issued
Array ( [id] => 5390726 [patent_doc_number] => 20090208039 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-20 [patent_title] => 'HYBRID ACTUATOR, LOUDSPEAKER AND SOUND OUTPUT METHOD' [patent_app_type] => utility [patent_app_number] => 12/294077 [patent_app_country] => US [patent_app_date] => 2007-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 9590 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0208/20090208039.pdf [firstpage_image] =>[orig_patent_app_number] => 12294077 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/294077
HYBRID ACTUATOR, LOUDSPEAKER AND SOUND OUTPUT METHOD May 17, 2007 Abandoned
Array ( [id] => 6290698 [patent_doc_number] => 20100239109 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-23 [patent_title] => 'ACOUSTIC DEVICE AND METHOD OF MANUFACTURING SAME' [patent_app_type] => utility [patent_app_number] => 12/303770 [patent_app_country] => US [patent_app_date] => 2007-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5843 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0239/20100239109.pdf [firstpage_image] =>[orig_patent_app_number] => 12303770 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/303770
Acoustic device and method of manufacturing same May 15, 2007 Issued
Array ( [id] => 62730 [patent_doc_number] => 07763485 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-07-27 [patent_title] => 'Laser facet pre-coating etch for controlling leakage current' [patent_app_type] => utility [patent_app_number] => 11/749061 [patent_app_country] => US [patent_app_date] => 2007-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5351 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/763/07763485.pdf [firstpage_image] =>[orig_patent_app_number] => 11749061 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/749061
Laser facet pre-coating etch for controlling leakage current May 14, 2007 Issued
Array ( [id] => 43695 [patent_doc_number] => 07776716 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-08-17 [patent_title] => 'Method for fabricating a semiconductor on insulator wafer' [patent_app_type] => utility [patent_app_number] => 11/746297 [patent_app_country] => US [patent_app_date] => 2007-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 4507 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/776/07776716.pdf [firstpage_image] =>[orig_patent_app_number] => 11746297 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/746297
Method for fabricating a semiconductor on insulator wafer May 8, 2007 Issued
Array ( [id] => 270427 [patent_doc_number] => 07563663 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-07-21 [patent_title] => 'Method of manufacturing semiconductor device with offset sidewall structure' [patent_app_type] => utility [patent_app_number] => 11/743021 [patent_app_country] => US [patent_app_date] => 2007-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 46 [patent_no_of_words] => 12091 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 282 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/563/07563663.pdf [firstpage_image] =>[orig_patent_app_number] => 11743021 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/743021
Method of manufacturing semiconductor device with offset sidewall structure Apr 30, 2007 Issued
Array ( [id] => 5002579 [patent_doc_number] => 20070200145 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-30 [patent_title] => 'Non-volatile memory device with conductive sidewall spacer and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 11/790957 [patent_app_country] => US [patent_app_date] => 2007-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5075 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0200/20070200145.pdf [firstpage_image] =>[orig_patent_app_number] => 11790957 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/790957
Non-volatile memory device with conductive sidewall spacer and method for fabricating the same Apr 29, 2007 Issued
Array ( [id] => 4432617 [patent_doc_number] => 07897480 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-01 [patent_title] => 'Preparation of high quality strained-semiconductor directly-on-insulator substrates' [patent_app_type] => utility [patent_app_number] => 11/738837 [patent_app_country] => US [patent_app_date] => 2007-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 15 [patent_no_of_words] => 7630 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 348 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/897/07897480.pdf [firstpage_image] =>[orig_patent_app_number] => 11738837 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/738837
Preparation of high quality strained-semiconductor directly-on-insulator substrates Apr 22, 2007 Issued
Array ( [id] => 162317 [patent_doc_number] => 07670920 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-02 [patent_title] => 'Methods and apparatus for forming a polysilicon capacitor' [patent_app_type] => utility [patent_app_number] => 11/697962 [patent_app_country] => US [patent_app_date] => 2007-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 2743 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/670/07670920.pdf [firstpage_image] =>[orig_patent_app_number] => 11697962 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/697962
Methods and apparatus for forming a polysilicon capacitor Apr 8, 2007 Issued
Array ( [id] => 5101341 [patent_doc_number] => 20070184603 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-09 [patent_title] => 'Method of fabricating semiconductor integrated circuit device' [patent_app_type] => utility [patent_app_number] => 11/783187 [patent_app_country] => US [patent_app_date] => 2007-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 6945 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0184/20070184603.pdf [firstpage_image] =>[orig_patent_app_number] => 11783187 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/783187
Method of fabricating semiconductor integrated circuit device with 99.99 wt% cobalt Apr 5, 2007 Issued
Array ( [id] => 5123441 [patent_doc_number] => 20070235711 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-11 [patent_title] => 'Methods of reducing the bandgap energy of a metal oxide' [patent_app_type] => utility [patent_app_number] => 11/731741 [patent_app_country] => US [patent_app_date] => 2007-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3776 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0235/20070235711.pdf [firstpage_image] =>[orig_patent_app_number] => 11731741 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/731741
Methods of reducing the bandgap energy of a metal oxide Mar 29, 2007 Abandoned
Array ( [id] => 285464 [patent_doc_number] => 07550391 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-06-23 [patent_title] => 'Method for forming fine patterns of a semiconductor device using double patterning' [patent_app_type] => utility [patent_app_number] => 11/730292 [patent_app_country] => US [patent_app_date] => 2007-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 24 [patent_no_of_words] => 7360 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/550/07550391.pdf [firstpage_image] =>[orig_patent_app_number] => 11730292 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/730292
Method for forming fine patterns of a semiconductor device using double patterning Mar 29, 2007 Issued
Array ( [id] => 5069614 [patent_doc_number] => 20070190716 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-16 [patent_title] => 'METHOD OF FABRICATING RECESS TRANSISTOR IN INTEGRATED CIRCUIT DEVICE AND RECESS TRANSISTOR IN INTEGRATED CIRCUIT DEVICE FABRICATED BY THE SAME' [patent_app_type] => utility [patent_app_number] => 11/691044 [patent_app_country] => US [patent_app_date] => 2007-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4108 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0190/20070190716.pdf [firstpage_image] =>[orig_patent_app_number] => 11691044 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/691044
Method of fabricating recess transistor in integrated circuit device and recess transistor in integrated circuit device fabricated by the same Mar 25, 2007 Issued
Array ( [id] => 4528309 [patent_doc_number] => 07923265 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-04-12 [patent_title] => 'Method and system for improving critical dimension proximity control of patterns on a mask or wafer' [patent_app_type] => utility [patent_app_number] => 11/688141 [patent_app_country] => US [patent_app_date] => 2007-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3084 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/923/07923265.pdf [firstpage_image] =>[orig_patent_app_number] => 11688141 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/688141
Method and system for improving critical dimension proximity control of patterns on a mask or wafer Mar 18, 2007 Issued
Array ( [id] => 168280 [patent_doc_number] => 07666788 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-02-23 [patent_title] => 'Methods for forming conductive vias in semiconductor device components' [patent_app_type] => utility [patent_app_number] => 11/717437 [patent_app_country] => US [patent_app_date] => 2007-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 23 [patent_no_of_words] => 7198 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/666/07666788.pdf [firstpage_image] =>[orig_patent_app_number] => 11717437 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/717437
Methods for forming conductive vias in semiconductor device components Mar 11, 2007 Issued
Array ( [id] => 211827 [patent_doc_number] => 07622733 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-11-24 [patent_title] => 'Semiconductor structure with a plastic housing and separable carrier plate' [patent_app_type] => utility [patent_app_number] => 11/685005 [patent_app_country] => US [patent_app_date] => 2007-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 6 [patent_no_of_words] => 2402 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/622/07622733.pdf [firstpage_image] =>[orig_patent_app_number] => 11685005 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/685005
Semiconductor structure with a plastic housing and separable carrier plate Mar 11, 2007 Issued
Array ( [id] => 221358 [patent_doc_number] => 07608904 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-10-27 [patent_title] => 'Semiconductor device components with conductive vias and systems including the components' [patent_app_type] => utility [patent_app_number] => 11/717294 [patent_app_country] => US [patent_app_date] => 2007-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 23 [patent_no_of_words] => 7185 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/608/07608904.pdf [firstpage_image] =>[orig_patent_app_number] => 11717294 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/717294
Semiconductor device components with conductive vias and systems including the components Mar 11, 2007 Issued
Array ( [id] => 1076953 [patent_doc_number] => 07615466 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-11-10 [patent_title] => 'Method for producing a semiconductor-on-insulator structure' [patent_app_type] => utility [patent_app_number] => 11/683731 [patent_app_country] => US [patent_app_date] => 2007-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 4862 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/615/07615466.pdf [firstpage_image] =>[orig_patent_app_number] => 11683731 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/683731
Method for producing a semiconductor-on-insulator structure Mar 7, 2007 Issued
Array ( [id] => 142714 [patent_doc_number] => 07687913 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-30 [patent_title] => 'Recovery of hydrophobicity of low-k and ultra low-k organosilicate films used as inter metal dielectrics' [patent_app_type] => utility [patent_app_number] => 11/676447 [patent_app_country] => US [patent_app_date] => 2007-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 6653 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/687/07687913.pdf [firstpage_image] =>[orig_patent_app_number] => 11676447 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/676447
Recovery of hydrophobicity of low-k and ultra low-k organosilicate films used as inter metal dielectrics Feb 18, 2007 Issued
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