
Mary Ann Calabrese
Examiner (ID: 17162, Phone: (571)272-8704 , Office: P/2913 )
| Most Active Art Unit | 2913 |
| Art Unit(s) | 2913, 2931 |
| Total Applications | 4143 |
| Issued Applications | 3856 |
| Pending Applications | 22 |
| Abandoned Applications | 276 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 3049347
[patent_doc_number] => 05324690
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-06-28
[patent_title] => 'Semiconductor device having a ternary boron nitride film and a method for forming the same'
[patent_app_type] => 1
[patent_app_number] => 8/011919
[patent_app_country] => US
[patent_app_date] => 1993-02-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 6
[patent_no_of_words] => 3597
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 56
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/324/05324690.pdf
[firstpage_image] =>[orig_patent_app_number] => 011919
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/011919 | Semiconductor device having a ternary boron nitride film and a method for forming the same | Jan 31, 1993 | Issued |
Array
(
[id] => 3064687
[patent_doc_number] => 05352635
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-10-04
[patent_title] => 'Silicon accelerometer fabrication method'
[patent_app_type] => 1
[patent_app_number] => 8/010500
[patent_app_country] => US
[patent_app_date] => 1993-01-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 12
[patent_no_of_words] => 3359
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 168
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/352/05352635.pdf
[firstpage_image] =>[orig_patent_app_number] => 010500
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/010500 | Silicon accelerometer fabrication method | Jan 27, 1993 | Issued |
Array
(
[id] => 3056953
[patent_doc_number] => 05338702
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-08-16
[patent_title] => 'Method for fabricating tungsten local interconnections in high density CMOS'
[patent_app_type] => 1
[patent_app_number] => 8/009511
[patent_app_country] => US
[patent_app_date] => 1993-01-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 5
[patent_no_of_words] => 2224
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/338/05338702.pdf
[firstpage_image] =>[orig_patent_app_number] => 009511
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/009511 | Method for fabricating tungsten local interconnections in high density CMOS | Jan 26, 1993 | Issued |
Array
(
[id] => 3026768
[patent_doc_number] => 05348894
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-09-20
[patent_title] => 'Method of forming electrical connections to high dielectric constant materials'
[patent_app_type] => 1
[patent_app_number] => 8/009521
[patent_app_country] => US
[patent_app_date] => 1993-01-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 13
[patent_no_of_words] => 2916
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/348/05348894.pdf
[firstpage_image] =>[orig_patent_app_number] => 009521
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/009521 | Method of forming electrical connections to high dielectric constant materials | Jan 26, 1993 | Issued |
Array
(
[id] => 3034076
[patent_doc_number] => 05300461
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-04-05
[patent_title] => 'Process for fabricating sealed semiconductor chip using silicon nitride passivation film'
[patent_app_type] => 1
[patent_app_number] => 8/008469
[patent_app_country] => US
[patent_app_date] => 1993-01-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 13
[patent_no_of_words] => 6495
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/300/05300461.pdf
[firstpage_image] =>[orig_patent_app_number] => 008469
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/008469 | Process for fabricating sealed semiconductor chip using silicon nitride passivation film | Jan 24, 1993 | Issued |
Array
(
[id] => 3004845
[patent_doc_number] => 05374594
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-12-20
[patent_title] => 'Gas-based backside protection during substrate processing'
[patent_app_type] => 1
[patent_app_number] => 8/007457
[patent_app_country] => US
[patent_app_date] => 1993-01-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 10
[patent_no_of_words] => 4436
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/374/05374594.pdf
[firstpage_image] =>[orig_patent_app_number] => 007457
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/007457 | Gas-based backside protection during substrate processing | Jan 21, 1993 | Issued |
Array
(
[id] => 3045631
[patent_doc_number] => 05324494
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-06-28
[patent_title] => 'Method for silicon carbide production by reacting silica with hydrocarbon gas'
[patent_app_type] => 1
[patent_app_number] => 8/007268
[patent_app_country] => US
[patent_app_date] => 1993-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 5
[patent_no_of_words] => 2883
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/324/05324494.pdf
[firstpage_image] =>[orig_patent_app_number] => 007268
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/007268 | Method for silicon carbide production by reacting silica with hydrocarbon gas | Jan 20, 1993 | Issued |
Array
(
[id] => 3106440
[patent_doc_number] => 05418185
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-05-23
[patent_title] => 'Method of making schottky diode with guard ring'
[patent_app_type] => 1
[patent_app_number] => 8/006911
[patent_app_country] => US
[patent_app_date] => 1993-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 12
[patent_no_of_words] => 2535
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 221
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/418/05418185.pdf
[firstpage_image] =>[orig_patent_app_number] => 006911
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/006911 | Method of making schottky diode with guard ring | Jan 20, 1993 | Issued |
Array
(
[id] => 3039028
[patent_doc_number] => 05376592
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-12-27
[patent_title] => 'Method of heat-treating a semiconductor wafer to determine processing conditions'
[patent_app_type] => 1
[patent_app_number] => 8/005299
[patent_app_country] => US
[patent_app_date] => 1993-01-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 2312
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 107
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/376/05376592.pdf
[firstpage_image] =>[orig_patent_app_number] => 005299
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/005299 | Method of heat-treating a semiconductor wafer to determine processing conditions | Jan 18, 1993 | Issued |
Array
(
[id] => 3070171
[patent_doc_number] => 05296211
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-03-22
[patent_title] => 'Production of Si.sub.2-x P.sub.x N.sub.2+x (NH).sub.1-x, where x=0.1 to 1.0'
[patent_app_type] => 1
[patent_app_number] => 8/001559
[patent_app_country] => US
[patent_app_date] => 1993-01-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2888
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 63
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/296/05296211.pdf
[firstpage_image] =>[orig_patent_app_number] => 001559
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/001559 | Production of Si.sub.2-x P.sub.x N.sub.2+x (NH).sub.1-x, where x=0.1 to 1.0 | Jan 5, 1993 | Issued |
Array
(
[id] => 3013947
[patent_doc_number] => 05302364
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-04-12
[patent_title] => 'Process for the preparation of amorphous silica'
[patent_app_type] => 1
[patent_app_number] => 7/996638
[patent_app_country] => US
[patent_app_date] => 1992-12-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 2057
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 19
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/302/05302364.pdf
[firstpage_image] =>[orig_patent_app_number] => 996638
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/996638 | Process for the preparation of amorphous silica | Dec 23, 1992 | Issued |
Array
(
[id] => 3073886
[patent_doc_number] => 05296410
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-03-22
[patent_title] => 'Method for separating fine patterns of a semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 7/992963
[patent_app_country] => US
[patent_app_date] => 1992-12-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 11
[patent_no_of_words] => 2657
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 144
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/296/05296410.pdf
[firstpage_image] =>[orig_patent_app_number] => 992963
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/992963 | Method for separating fine patterns of a semiconductor device | Dec 15, 1992 | Issued |
Array
(
[id] => 3122341
[patent_doc_number] => 05384287
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-01-24
[patent_title] => 'Method of forming a semiconductor device having self-aligned contact holes'
[patent_app_type] => 1
[patent_app_number] => 7/989349
[patent_app_country] => US
[patent_app_date] => 1992-12-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 29
[patent_no_of_words] => 8041
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 205
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/384/05384287.pdf
[firstpage_image] =>[orig_patent_app_number] => 989349
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/989349 | Method of forming a semiconductor device having self-aligned contact holes | Dec 10, 1992 | Issued |
Array
(
[id] => 3009628
[patent_doc_number] => 05308596
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-05-03
[patent_title] => 'Process for the production of crystalline sodium disilicate in an externally heated rotary kiln having temperature zones'
[patent_app_type] => 1
[patent_app_number] => 7/986983
[patent_app_country] => US
[patent_app_date] => 1992-12-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 2689
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 286
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/308/05308596.pdf
[firstpage_image] =>[orig_patent_app_number] => 986983
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/986983 | Process for the production of crystalline sodium disilicate in an externally heated rotary kiln having temperature zones | Dec 7, 1992 | Issued |
Array
(
[id] => 3107434
[patent_doc_number] => 05407868
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-04-18
[patent_title] => 'Method of making an electrode tip for a tunnel current sensing device'
[patent_app_type] => 1
[patent_app_number] => 7/988591
[patent_app_country] => US
[patent_app_date] => 1992-12-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 2058
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 170
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/407/05407868.pdf
[firstpage_image] =>[orig_patent_app_number] => 988591
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/988591 | Method of making an electrode tip for a tunnel current sensing device | Dec 7, 1992 | Issued |
Array
(
[id] => 2935255
[patent_doc_number] => 05260233
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-11-09
[patent_title] => 'Semiconductor device and wafer structure having a planar buried interconnect by wafer bonding'
[patent_app_type] => 1
[patent_app_number] => 7/973131
[patent_app_country] => US
[patent_app_date] => 1992-11-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 11
[patent_no_of_words] => 2839
[patent_no_of_claims] => 43
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 157
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/260/05260233.pdf
[firstpage_image] =>[orig_patent_app_number] => 973131
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/973131 | Semiconductor device and wafer structure having a planar buried interconnect by wafer bonding | Nov 5, 1992 | Issued |
Array
(
[id] => 3049370
[patent_doc_number] => 05344634
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-09-06
[patent_title] => 'Method of nitriding silicon'
[patent_app_type] => 1
[patent_app_number] => 7/972070
[patent_app_country] => US
[patent_app_date] => 1992-11-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4478
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/344/05344634.pdf
[firstpage_image] =>[orig_patent_app_number] => 972070
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/972070 | Method of nitriding silicon | Nov 2, 1992 | Issued |
Array
(
[id] => 2999995
[patent_doc_number] => 05371047
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-12-06
[patent_title] => 'Chip interconnection having a breathable etch stop layer'
[patent_app_type] => 1
[patent_app_number] => 7/968789
[patent_app_country] => US
[patent_app_date] => 1992-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 4
[patent_no_of_words] => 2534
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 355
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/371/05371047.pdf
[firstpage_image] =>[orig_patent_app_number] => 968789
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/968789 | Chip interconnection having a breathable etch stop layer | Oct 29, 1992 | Issued |
| 07/967495 | METHOD FOR PRODUCING METAL OXIDE AEROGELS | Oct 27, 1992 | Abandoned |
Array
(
[id] => 3446512
[patent_doc_number] => 05387557
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-02-07
[patent_title] => 'Method for manufacturing semiconductor devices using heat-treatment vertical reactor with temperature zones'
[patent_app_type] => 1
[patent_app_number] => 7/964609
[patent_app_country] => US
[patent_app_date] => 1992-10-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 7390
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 272
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/387/05387557.pdf
[firstpage_image] =>[orig_patent_app_number] => 964609
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/964609 | Method for manufacturing semiconductor devices using heat-treatment vertical reactor with temperature zones | Oct 21, 1992 | Issued |