Search

Mary Ann Calabrese

Examiner (ID: 18530, Phone: (571)272-8704 , Office: P/2913 )

Most Active Art Unit
2913
Art Unit(s)
2931, 2913
Total Applications
4141
Issued Applications
3855
Pending Applications
21
Abandoned Applications
276

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6664284 [patent_doc_number] => 20030203610 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-30 [patent_title] => 'SEMICONDUCTOR PROCESSING METHOD' [patent_app_type] => new [patent_app_number] => 10/431822 [patent_app_country] => US [patent_app_date] => 2003-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2847 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0203/20030203610.pdf [firstpage_image] =>[orig_patent_app_number] => 10431822 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/431822
Semiconductor processing method May 7, 2003 Issued
Array ( [id] => 1082924 [patent_doc_number] => 06833327 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-12-21 [patent_title] => 'Method of fabraicating semiconductor device' [patent_app_type] => B2 [patent_app_number] => 10/434012 [patent_app_country] => US [patent_app_date] => 2003-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 60 [patent_no_of_words] => 17546 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/833/06833327.pdf [firstpage_image] =>[orig_patent_app_number] => 10434012 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/434012
Method of fabraicating semiconductor device May 7, 2003 Issued
Array ( [id] => 7396868 [patent_doc_number] => 20040104439 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-03 [patent_title] => 'Method of depositing barrier layer from metal gates' [patent_app_type] => new [patent_app_number] => 10/430811 [patent_app_country] => US [patent_app_date] => 2003-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5360 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0104/20040104439.pdf [firstpage_image] =>[orig_patent_app_number] => 10430811 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/430811
Method of depositing barrier layer for metal gates May 4, 2003 Issued
Array ( [id] => 1155583 [patent_doc_number] => 06764903 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-07-20 [patent_title] => 'Dual hard mask layer patterning method' [patent_app_type] => B1 [patent_app_number] => 10/427451 [patent_app_country] => US [patent_app_date] => 2003-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 6 [patent_no_of_words] => 2772 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/764/06764903.pdf [firstpage_image] =>[orig_patent_app_number] => 10427451 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/427451
Dual hard mask layer patterning method Apr 29, 2003 Issued
Array ( [id] => 1155756 [patent_doc_number] => 06764927 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-07-20 [patent_title] => 'Chemical vapor deposition (CVD) method employing wetting pre-treatment' [patent_app_type] => B1 [patent_app_number] => 10/423083 [patent_app_country] => US [patent_app_date] => 2003-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 2730 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/764/06764927.pdf [firstpage_image] =>[orig_patent_app_number] => 10423083 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/423083
Chemical vapor deposition (CVD) method employing wetting pre-treatment Apr 23, 2003 Issued
Array ( [id] => 6678603 [patent_doc_number] => 20030228744 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-12-11 [patent_title] => 'Manufacturing method of semiconductor device' [patent_app_type] => new [patent_app_number] => 10/422302 [patent_app_country] => US [patent_app_date] => 2003-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7819 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 23 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0228/20030228744.pdf [firstpage_image] =>[orig_patent_app_number] => 10422302 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/422302
Manufacturing method of semiconductor device Apr 23, 2003 Issued
Array ( [id] => 7135196 [patent_doc_number] => 20040043594 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-04 [patent_title] => 'Semiconductor device having a polysilicon line structure with increased metal silicide portions and method for forming the polysilicon line structure of a semiconductor device' [patent_app_type] => new [patent_app_number] => 10/422492 [patent_app_country] => US [patent_app_date] => 2003-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7185 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0043/20040043594.pdf [firstpage_image] =>[orig_patent_app_number] => 10422492 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/422492
Semiconductor device having a polysilicon line structure with increased metal silicide portions and method for forming the polysilicon line structure of a semiconductor device Apr 23, 2003 Issued
Array ( [id] => 6725259 [patent_doc_number] => 20030207571 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-06 [patent_title] => 'Gate technology for strained surface channel and strained buried channel MOSFET devices' [patent_app_type] => new [patent_app_number] => 10/421154 [patent_app_country] => US [patent_app_date] => 2003-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4333 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0207/20030207571.pdf [firstpage_image] =>[orig_patent_app_number] => 10421154 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/421154
Gate technology for strained surface channel and strained buried channel MOSFET devices Apr 22, 2003 Issued
Array ( [id] => 7383681 [patent_doc_number] => 20040082195 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-29 [patent_title] => 'Production method of a thin film device, production method of a transistor, electro-optical apparatus and electronic equipment' [patent_app_type] => new [patent_app_number] => 10/417181 [patent_app_country] => US [patent_app_date] => 2003-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 36 [patent_no_of_words] => 20127 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0082/20040082195.pdf [firstpage_image] =>[orig_patent_app_number] => 10417181 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/417181
Production method of a thin film device, production method of a transistor, electro-optical apparatus and electronic equipment Apr 16, 2003 Issued
Array ( [id] => 1155265 [patent_doc_number] => 06764864 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-07-20 [patent_title] => 'BST on low-loss substrates for frequency agile applications' [patent_app_type] => B1 [patent_app_number] => 10/418372 [patent_app_country] => US [patent_app_date] => 2003-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 4 [patent_no_of_words] => 2535 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/764/06764864.pdf [firstpage_image] =>[orig_patent_app_number] => 10418372 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/418372
BST on low-loss substrates for frequency agile applications Apr 16, 2003 Issued
Array ( [id] => 7411659 [patent_doc_number] => 20040207030 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-21 [patent_title] => 'Conductive transistor structure for a semiconductor device and method for forming same' [patent_app_type] => new [patent_app_number] => 10/418412 [patent_app_country] => US [patent_app_date] => 2003-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2694 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 3 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0207/20040207030.pdf [firstpage_image] =>[orig_patent_app_number] => 10418412 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/418412
Conductive transistor structure for a semiconductor device and method for forming same Apr 15, 2003 Abandoned
Array ( [id] => 6662148 [patent_doc_number] => 20030201474 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-30 [patent_title] => 'Semiconductor device with multiple source/drain regions of different depths' [patent_app_type] => new [patent_app_number] => 10/410536 [patent_app_country] => US [patent_app_date] => 2003-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2437 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0201/20030201474.pdf [firstpage_image] =>[orig_patent_app_number] => 10410536 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/410536
Semiconductor device with multiple source/drain regions of different depths Apr 8, 2003 Abandoned
Array ( [id] => 6797167 [patent_doc_number] => 20030176041 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-18 [patent_title] => 'Method for fabricating semiconductor device' [patent_app_type] => new [patent_app_number] => 10/409964 [patent_app_country] => US [patent_app_date] => 2003-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2437 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0176/20030176041.pdf [firstpage_image] =>[orig_patent_app_number] => 10409964 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/409964
Method for fabricating semiconductor device Apr 8, 2003 Issued
Array ( [id] => 1216493 [patent_doc_number] => 06706615 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-03-16 [patent_title] => 'Method of manufacturing a transistor' [patent_app_type] => B2 [patent_app_number] => 10/401672 [patent_app_country] => US [patent_app_date] => 2003-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 33 [patent_no_of_words] => 5800 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/706/06706615.pdf [firstpage_image] =>[orig_patent_app_number] => 10401672 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/401672
Method of manufacturing a transistor Mar 30, 2003 Issued
Array ( [id] => 1223707 [patent_doc_number] => 06699755 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-02 [patent_title] => 'Method for producing a gate' [patent_app_type] => B1 [patent_app_number] => 10/249212 [patent_app_country] => US [patent_app_date] => 2003-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2304 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/699/06699755.pdf [firstpage_image] =>[orig_patent_app_number] => 10249212 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/249212
Method for producing a gate Mar 23, 2003 Issued
Array ( [id] => 6944920 [patent_doc_number] => 20050196969 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-08 [patent_title] => 'Method of preparation of organic optoelectronic and electronic devices and devices thereby obtained' [patent_app_type] => utility [patent_app_number] => 10/509311 [patent_app_country] => US [patent_app_date] => 2003-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7254 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0196/20050196969.pdf [firstpage_image] =>[orig_patent_app_number] => 10509311 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/509311
Method of preparation of organic optoelectronic and electronic devices and devices thereby obtained Mar 20, 2003 Issued
Array ( [id] => 1188839 [patent_doc_number] => 06734070 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-05-11 [patent_title] => 'Method of fabricating a semiconductor device with field-effect transistors having shallow source and drain junctions' [patent_app_type] => B1 [patent_app_number] => 10/388474 [patent_app_country] => US [patent_app_date] => 2003-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 25 [patent_no_of_words] => 4658 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/734/06734070.pdf [firstpage_image] =>[orig_patent_app_number] => 10388474 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/388474
Method of fabricating a semiconductor device with field-effect transistors having shallow source and drain junctions Mar 16, 2003 Issued
Array ( [id] => 6797159 [patent_doc_number] => 20030176033 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-18 [patent_title] => 'Disposable spacer technology for reduced cost CMOS processing' [patent_app_type] => new [patent_app_number] => 10/389017 [patent_app_country] => US [patent_app_date] => 2003-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1980 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0176/20030176033.pdf [firstpage_image] =>[orig_patent_app_number] => 10389017 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/389017
Disposable spacer technology for reduced cost CMOS processing Mar 12, 2003 Issued
Array ( [id] => 6708969 [patent_doc_number] => 20030168718 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-11 [patent_title] => 'Punch through type power device' [patent_app_type] => new [patent_app_number] => 10/383515 [patent_app_country] => US [patent_app_date] => 2003-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 8651 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0168/20030168718.pdf [firstpage_image] =>[orig_patent_app_number] => 10383515 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/383515
Punch through type power device Mar 9, 2003 Issued
Array ( [id] => 1180946 [patent_doc_number] => 06737325 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-05-18 [patent_title] => 'Method and system for forming a transistor having source and drain extensions' [patent_app_type] => B1 [patent_app_number] => 10/383322 [patent_app_country] => US [patent_app_date] => 2003-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 1893 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/737/06737325.pdf [firstpage_image] =>[orig_patent_app_number] => 10383322 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/383322
Method and system for forming a transistor having source and drain extensions Mar 5, 2003 Issued
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