
Mary Ann Calabrese
Examiner (ID: 18530, Phone: (571)272-8704 , Office: P/2913 )
| Most Active Art Unit | 2913 |
| Art Unit(s) | 2931, 2913 |
| Total Applications | 4141 |
| Issued Applications | 3855 |
| Pending Applications | 21 |
| Abandoned Applications | 276 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1192885
[patent_doc_number] => 06730531
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-05-04
[patent_title] => 'Method for forming quantum dot'
[patent_app_type] => B2
[patent_app_number] => 10/320402
[patent_app_country] => US
[patent_app_date] => 2002-12-17
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[pdf_file] => patents/06/730/06730531.pdf
[firstpage_image] =>[orig_patent_app_number] => 10320402
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/320402 | Method for forming quantum dot | Dec 16, 2002 | Issued |
Array
(
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[patent_doc_number] => 06812069
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[patent_kind] => B2
[patent_issue_date] => 2004-11-02
[patent_title] => 'Method for improving semiconductor process wafer CMP uniformity while avoiding fracture'
[patent_app_type] => B2
[patent_app_number] => 10/322691
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/322691 | Method for improving semiconductor process wafer CMP uniformity while avoiding fracture | Dec 16, 2002 | Issued |
Array
(
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[patent_doc_number] => 20040082154
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[patent_kind] => A1
[patent_issue_date] => 2004-04-29
[patent_title] => 'METHOD FOR FABRICATING IMAGE SENSOR USING SALICIDE PROCESS'
[patent_app_type] => new
[patent_app_number] => 10/318072
[patent_app_country] => US
[patent_app_date] => 2002-12-13
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[pdf_file] => publications/A1/0082/20040082154.pdf
[firstpage_image] =>[orig_patent_app_number] => 10318072
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/318072 | Method for fabricating image sensor using salicide process | Dec 12, 2002 | Issued |
Array
(
[id] => 1209263
[patent_doc_number] => 06713338
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-03-30
[patent_title] => 'Method for fabricating source/drain devices'
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[patent_app_number] => 10/315992
[patent_app_country] => US
[patent_app_date] => 2002-12-11
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/315992 | Method for fabricating source/drain devices | Dec 10, 2002 | Issued |
Array
(
[id] => 7289756
[patent_doc_number] => 20040110352
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[patent_issue_date] => 2004-06-10
[patent_title] => 'SOURCE DRAIN AND EXTENSION DOPANT CONCENTRATION'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/316468 | Source drain and extension dopant concentration | Dec 9, 2002 | Issued |
Array
(
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[patent_doc_number] => 06660604
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[patent_issue_date] => 2003-12-09
[patent_title] => 'Method of forming double junction region and method of forming transfer transistor using the same'
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[patent_app_number] => 10/314442
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/314442 | Method of forming double junction region and method of forming transfer transistor using the same | Dec 8, 2002 | Issued |
Array
(
[id] => 472371
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[patent_issue_date] => 2007-06-12
[patent_title] => 'Forming electrical contacts to a molecular layer'
[patent_app_type] => utility
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[patent_app_country] => US
[patent_app_date] => 2002-12-02
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[pdf_file] => patents/07/229/07229847.pdf
[firstpage_image] =>[orig_patent_app_number] => 10307642
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/307642 | Forming electrical contacts to a molecular layer | Dec 1, 2002 | Issued |
Array
(
[id] => 509322
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[patent_issue_date] => 2007-03-27
[patent_title] => 'Split manufacturing method for advanced semiconductor circuits'
[patent_app_type] => utility
[patent_app_number] => 10/305670
[patent_app_country] => US
[patent_app_date] => 2002-11-27
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[pdf_file] => patents/07/195/07195931.pdf
[firstpage_image] =>[orig_patent_app_number] => 10305670
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/305670 | Split manufacturing method for advanced semiconductor circuits | Nov 26, 2002 | Issued |
Array
(
[id] => 6696927
[patent_doc_number] => 20030109121
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[patent_issue_date] => 2003-06-12
[patent_title] => 'Multiple work function gates'
[patent_app_type] => new
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[pdf_file] => publications/A1/0109/20030109121.pdf
[firstpage_image] =>[orig_patent_app_number] => 10302212
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/302212 | Multiple work function gates | Nov 21, 2002 | Issued |
Array
(
[id] => 7472194
[patent_doc_number] => 20040097071
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[patent_issue_date] => 2004-05-20
[patent_title] => 'Method of electoless deposition of thin metal and dielectric films with temperature controlled on stages of film growth'
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[patent_app_number] => 10/299070
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/299070 | Method of electroless deposition of thin metal and dielectric films with temperature controlled stages of film growth | Nov 18, 2002 | Issued |
Array
(
[id] => 1264451
[patent_doc_number] => 06660605
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[patent_issue_date] => 2003-12-09
[patent_title] => 'Method to fabricate optimal HDD with dual diffusion process to optimize transistor drive current junction capacitance, tunneling current and channel dopant loss'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/292722 | Method to fabricate optimal HDD with dual diffusion process to optimize transistor drive current junction capacitance, tunneling current and channel dopant loss | Nov 11, 2002 | Issued |
Array
(
[id] => 1146517
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[patent_title] => 'Furnace system and method for selectively oxidizing a sidewall surface of a gate conductor by oxidizing a silicon sidewall in lieu of a refractory metal sidewall'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/290841 | Furnace system and method for selectively oxidizing a sidewall surface of a gate conductor by oxidizing a silicon sidewall in lieu of a refractory metal sidewall | Nov 7, 2002 | Issued |
Array
(
[id] => 6761463
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[patent_title] => 'Method of forming a gate electrode in a semiconductor device'
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Array
(
[id] => 1221675
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[patent_title] => 'Strained silicon PMOS having silicon germanium source/drain extensions and method for its fabrication'
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Array
(
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[patent_title] => 'Formation of ultra-shallow depth source/drain extensions for MOS transistors'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/273291 | Formation of ultra-shallow depth source/drain extensions for MOS transistors | Oct 17, 2002 | Issued |
Array
(
[id] => 1297476
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[patent_issue_date] => 2003-09-30
[patent_title] => 'Method to reduce metal silicide void formation'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/268212 | Method to reduce metal silicide void formation | Oct 9, 2002 | Issued |
Array
(
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[patent_title] => 'Transistor structures including separate anti-punchthrough layers and methods of forming same'
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/148729 | Tripod particularly for optical and photographic use | Oct 2, 2002 | Issued |
Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/261611 | Method and apparatus for capturing fault state data | Sep 29, 2002 | Issued |