
Mary Ann Calabrese
Examiner (ID: 18530, Phone: (571)272-8704 , Office: P/2913 )
| Most Active Art Unit | 2913 |
| Art Unit(s) | 2931, 2913 |
| Total Applications | 4141 |
| Issued Applications | 3855 |
| Pending Applications | 21 |
| Abandoned Applications | 276 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1570159
[patent_doc_number] => 06498052
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2002-12-24
[patent_title] => 'Circuit, method of adhering an integrated circuit device to a substrate, and method of forming a circuit'
[patent_app_type] => B2
[patent_app_number] => 09/974001
[patent_app_country] => US
[patent_app_date] => 2001-10-09
[patent_effective_date] => 0000-00-00
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/498/06498052.pdf
[firstpage_image] =>[orig_patent_app_number] => 09974001
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/974001 | Circuit, method of adhering an integrated circuit device to a substrate, and method of forming a circuit | Oct 8, 2001 | Issued |
Array
(
[id] => 5921980
[patent_doc_number] => 20020115238
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-08-22
[patent_title] => 'STITCHED PLANE STRUCTURE FOR PACKAGE POWER DELIVERY AND DUAL REFERENCED STRIPLINE I/O PERFORMANCE'
[patent_app_type] => new
[patent_app_number] => 09/972532
[patent_app_country] => US
[patent_app_date] => 2001-10-05
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0115/20020115238.pdf
[firstpage_image] =>[orig_patent_app_number] => 09972532
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/972532 | Stitched plane structure for package power delivery and dual referenced stripline I/O performance | Oct 4, 2001 | Issued |
Array
(
[id] => 7450104
[patent_doc_number] => 20040067612
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-04-08
[patent_title] => 'Miniaturised ldd-type mos transistors'
[patent_app_type] => new
[patent_app_number] => 10/257209
[patent_app_country] => US
[patent_app_date] => 2003-01-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[pdf_file] => publications/A1/0067/20040067612.pdf
[firstpage_image] =>[orig_patent_app_number] => 10257209
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/257209 | LDD-type miniaturized MOS transistors | Oct 4, 2001 | Issued |
Array
(
[id] => 6032967
[patent_doc_number] => 20020019075
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-02-14
[patent_title] => 'METHODS OF FORMING A CIRCUIT AND METHODS OF PREPARING AN INTEGRATED CIRCUIT'
[patent_app_type] => new
[patent_app_number] => 09/971819
[patent_app_country] => US
[patent_app_date] => 2001-10-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[firstpage_image] =>[orig_patent_app_number] => 09971819
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/971819 | Methods of forming a circuit and methods of preparing an integrated circuit | Oct 2, 2001 | Issued |
Array
(
[id] => 6781122
[patent_doc_number] => 20030062569
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-04-03
[patent_title] => 'SELF-ALIGNED DUAL-OXIDE UMOSFET DEVICE AND A METHOD OF FABRICATING SAME'
[patent_app_type] => new
[patent_app_number] => 09/968142
[patent_app_country] => US
[patent_app_date] => 2001-10-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[pdf_file] => publications/A1/0062/20030062569.pdf
[firstpage_image] =>[orig_patent_app_number] => 09968142
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/968142 | Self-aligned dual-oxide umosfet device and a method of fabricating same | Sep 30, 2001 | Issued |
Array
(
[id] => 1588812
[patent_doc_number] => 06482703
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-11-19
[patent_title] => 'Method for fabricating an electrostatic discharge device in a dual gate oxide process'
[patent_app_type] => B1
[patent_app_number] => 09/965322
[patent_app_country] => US
[patent_app_date] => 2001-09-28
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[firstpage_image] =>[orig_patent_app_number] => 09965322
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/965322 | Method for fabricating an electrostatic discharge device in a dual gate oxide process | Sep 27, 2001 | Issued |
Array
(
[id] => 1205645
[patent_doc_number] => 06716734
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-04-06
[patent_title] => 'Low temperature sidewall oxidation of W/WN/poly-gatestack'
[patent_app_type] => B2
[patent_app_number] => 09/965092
[patent_app_country] => US
[patent_app_date] => 2001-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[pdf_file] => patents/06/716/06716734.pdf
[firstpage_image] =>[orig_patent_app_number] => 09965092
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/965092 | Low temperature sidewall oxidation of W/WN/poly-gatestack | Sep 27, 2001 | Issued |
Array
(
[id] => 1324153
[patent_doc_number] => 06606135
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-08-12
[patent_title] => 'Optical lens system, image display apparatus, micro-lens array, liquid crystal display device, and liquid crystal display apparatus of projection-type'
[patent_app_type] => B2
[patent_app_number] => 09/964520
[patent_app_country] => US
[patent_app_date] => 2001-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
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[patent_no_of_words] => 12387
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[pdf_file] => patents/06/606/06606135.pdf
[firstpage_image] =>[orig_patent_app_number] => 09964520
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/964520 | Optical lens system, image display apparatus, micro-lens array, liquid crystal display device, and liquid crystal display apparatus of projection-type | Sep 27, 2001 | Issued |
Array
(
[id] => 1277884
[patent_doc_number] => 06645840
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-11-11
[patent_title] => 'Multi-layered polysilicon process'
[patent_app_type] => B2
[patent_app_number] => 09/967061
[patent_app_country] => US
[patent_app_date] => 2001-09-28
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/645/06645840.pdf
[firstpage_image] =>[orig_patent_app_number] => 09967061
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/967061 | Multi-layered polysilicon process | Sep 27, 2001 | Issued |
Array
(
[id] => 1285346
[patent_doc_number] => 06638860
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-10-28
[patent_title] => 'Method and apparatus for processing substrates and method for manufacturing a semiconductor device'
[patent_app_type] => B2
[patent_app_number] => 09/963382
[patent_app_country] => US
[patent_app_date] => 2001-09-27
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[firstpage_image] =>[orig_patent_app_number] => 09963382
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/963382 | Method and apparatus for processing substrates and method for manufacturing a semiconductor device | Sep 26, 2001 | Issued |
Array
(
[id] => 6209359
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[patent_issue_date] => 2002-06-13
[patent_title] => 'Method of manufacturing semiconductor devices'
[patent_app_type] => new
[patent_app_number] => 09/962112
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Array
(
[id] => 1358924
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[patent_title] => 'Highly conductive composite polysilicon gate for CMOS integrated circuits'
[patent_app_type] => B2
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[firstpage_image] =>[orig_patent_app_number] => 09964172
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/964172 | Highly conductive composite polysilicon gate for CMOS integrated circuits | Sep 25, 2001 | Issued |
Array
(
[id] => 5874012
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[patent_title] => 'Semiconductor device and method of manufacturing the same'
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Array
(
[id] => 1214275
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[patent_title] => 'RF chipset architecture'
[patent_app_type] => B2
[patent_app_number] => 09/962717
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/961222 | Method for manufacturing semiconductor devices | Sep 20, 2001 | Abandoned |
Array
(
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Array
(
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Array
(
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Array
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Array
(
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[patent_title] => 'Single molecule array on silicon substrate for quantum computer'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/362821 | Single molecule array on silicon substrate for quantum computer | Aug 23, 2001 | Issued |