Search

Mary Ann Calabrese

Examiner (ID: 18530, Phone: (571)272-8704 , Office: P/2913 )

Most Active Art Unit
2913
Art Unit(s)
2931, 2913
Total Applications
4141
Issued Applications
3855
Pending Applications
21
Abandoned Applications
276

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1435913 [patent_doc_number] => 06355556 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-12 [patent_title] => 'Method for fabricating transistor' [patent_app_type] => B1 [patent_app_number] => 09/675972 [patent_app_country] => US [patent_app_date] => 2000-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 2090 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/355/06355556.pdf [firstpage_image] =>[orig_patent_app_number] => 09675972 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/675972
Method for fabricating transistor Sep 28, 2000 Issued
Array ( [id] => 1494248 [patent_doc_number] => 06342423 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-29 [patent_title] => 'MOS-type transistor processing utilizing UV-nitride removable spacer and HF etch' [patent_app_type] => B1 [patent_app_number] => 09/667781 [patent_app_country] => US [patent_app_date] => 2000-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 9 [patent_no_of_words] => 4665 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 344 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/342/06342423.pdf [firstpage_image] =>[orig_patent_app_number] => 09667781 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/667781
MOS-type transistor processing utilizing UV-nitride removable spacer and HF etch Sep 21, 2000 Issued
Array ( [id] => 1565935 [patent_doc_number] => 06376347 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-23 [patent_title] => 'Method of making gate wiring layer over semiconductor substrate' [patent_app_type] => B1 [patent_app_number] => 09/665962 [patent_app_country] => US [patent_app_date] => 2000-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 36 [patent_no_of_words] => 5179 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/376/06376347.pdf [firstpage_image] =>[orig_patent_app_number] => 09665962 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/665962
Method of making gate wiring layer over semiconductor substrate Sep 20, 2000 Issued
Array ( [id] => 1514497 [patent_doc_number] => 06420236 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-16 [patent_title] => 'Hydrogen treatment for threshold voltage shift of metal gate MOSFET devices' [patent_app_type] => B1 [patent_app_number] => 09/641053 [patent_app_country] => US [patent_app_date] => 2000-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2336 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/420/06420236.pdf [firstpage_image] =>[orig_patent_app_number] => 09641053 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/641053
Hydrogen treatment for threshold voltage shift of metal gate MOSFET devices Aug 16, 2000 Issued
Array ( [id] => 1542579 [patent_doc_number] => 06372584 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-16 [patent_title] => 'Method for making raised source/drain regions using laser' [patent_app_type] => B1 [patent_app_number] => 09/628382 [patent_app_country] => US [patent_app_date] => 2000-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 9 [patent_no_of_words] => 1687 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/372/06372584.pdf [firstpage_image] =>[orig_patent_app_number] => 09628382 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/628382
Method for making raised source/drain regions using laser Jul 31, 2000 Issued
Array ( [id] => 1459474 [patent_doc_number] => 06391751 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-21 [patent_title] => 'Method for forming vertical profile of polysilicon gate electrodes' [patent_app_type] => B1 [patent_app_number] => 09/626668 [patent_app_country] => US [patent_app_date] => 2000-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2354 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/391/06391751.pdf [firstpage_image] =>[orig_patent_app_number] => 09626668 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/626668
Method for forming vertical profile of polysilicon gate electrodes Jul 26, 2000 Issued
Array ( [id] => 1332299 [patent_doc_number] => 06596595 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-22 [patent_title] => 'Forming a conductive structure in a semiconductor device' [patent_app_type] => B1 [patent_app_number] => 09/620442 [patent_app_country] => US [patent_app_date] => 2000-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4029 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/596/06596595.pdf [firstpage_image] =>[orig_patent_app_number] => 09620442 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/620442
Forming a conductive structure in a semiconductor device Jul 19, 2000 Issued
09/529611 METHOD OF FORMING AN ELECTRONIC DEVICE Jul 18, 2000 Abandoned
Array ( [id] => 1485236 [patent_doc_number] => 06365468 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-02 [patent_title] => 'Method for forming doped p-type gate with anti-reflection layer' [patent_app_type] => B1 [patent_app_number] => 09/598192 [patent_app_country] => US [patent_app_date] => 2000-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 1833 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/365/06365468.pdf [firstpage_image] =>[orig_patent_app_number] => 09598192 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/598192
Method for forming doped p-type gate with anti-reflection layer Jun 20, 2000 Issued
Array ( [id] => 4326463 [patent_doc_number] => 06319762 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-20 [patent_title] => 'Method for fabricating poly-spacers' [patent_app_type] => 1 [patent_app_number] => 9/597832 [patent_app_country] => US [patent_app_date] => 2000-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 1596 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/319/06319762.pdf [firstpage_image] =>[orig_patent_app_number] => 597832 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/597832
Method for fabricating poly-spacers Jun 18, 2000 Issued
Array ( [id] => 4381632 [patent_doc_number] => 06277735 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-21 [patent_title] => 'Method for forming a refractory metal silicide layer' [patent_app_type] => 1 [patent_app_number] => 9/593384 [patent_app_country] => US [patent_app_date] => 2000-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 38 [patent_no_of_words] => 23639 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/277/06277735.pdf [firstpage_image] =>[orig_patent_app_number] => 593384 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/593384
Method for forming a refractory metal silicide layer Jun 13, 2000 Issued
Array ( [id] => 4395215 [patent_doc_number] => 06297137 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-02 [patent_title] => 'Method for forming gate electrode in semiconductor device capable of preventing distortion of oxidation profile thereof' [patent_app_type] => 1 [patent_app_number] => 9/591402 [patent_app_country] => US [patent_app_date] => 2000-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 1389 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/297/06297137.pdf [firstpage_image] =>[orig_patent_app_number] => 591402 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/591402
Method for forming gate electrode in semiconductor device capable of preventing distortion of oxidation profile thereof Jun 11, 2000 Issued
Array ( [id] => 1581093 [patent_doc_number] => 06423598 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-23 [patent_title] => 'Semiconductor device, a method of manufacturing the same, and a semiconductor device protective circuit' [patent_app_type] => B1 [patent_app_number] => 09/555522 [patent_app_country] => US [patent_app_date] => 2000-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 22 [patent_no_of_words] => 6411 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/423/06423598.pdf [firstpage_image] =>[orig_patent_app_number] => 09555522 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/555522
Semiconductor device, a method of manufacturing the same, and a semiconductor device protective circuit Jun 7, 2000 Issued
Array ( [id] => 1361877 [patent_doc_number] => 06569753 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-27 [patent_title] => 'Collar positionable about a periphery of a contact pad and around a conductive structure secured to the contact pads, semiconductor device components including same, and methods for fabricating same' [patent_app_type] => B1 [patent_app_number] => 09/590418 [patent_app_country] => US [patent_app_date] => 2000-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 9582 [patent_no_of_claims] => 70 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/569/06569753.pdf [firstpage_image] =>[orig_patent_app_number] => 09590418 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/590418
Collar positionable about a periphery of a contact pad and around a conductive structure secured to the contact pads, semiconductor device components including same, and methods for fabricating same Jun 7, 2000 Issued
Array ( [id] => 4408349 [patent_doc_number] => 06300202 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-09 [patent_title] => 'Selective removal of a metal oxide dielectric' [patent_app_type] => 1 [patent_app_number] => 9/574732 [patent_app_country] => US [patent_app_date] => 2000-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 3293 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/300/06300202.pdf [firstpage_image] =>[orig_patent_app_number] => 574732 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/574732
Selective removal of a metal oxide dielectric May 17, 2000 Issued
Array ( [id] => 493598 [patent_doc_number] => 07211496 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-05-01 [patent_title] => 'Freestanding multiplayer IC wiring structure' [patent_app_type] => utility [patent_app_number] => 09/567337 [patent_app_country] => US [patent_app_date] => 2000-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 36 [patent_no_of_words] => 14115 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/211/07211496.pdf [firstpage_image] =>[orig_patent_app_number] => 09567337 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/567337
Freestanding multiplayer IC wiring structure May 8, 2000 Issued
Array ( [id] => 4358369 [patent_doc_number] => 06255180 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-03 [patent_title] => 'Semiconductor device with outwardly tapered sidewall spacers and method for forming same' [patent_app_type] => 1 [patent_app_number] => 9/565292 [patent_app_country] => US [patent_app_date] => 2000-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 5181 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/255/06255180.pdf [firstpage_image] =>[orig_patent_app_number] => 565292 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/565292
Semiconductor device with outwardly tapered sidewall spacers and method for forming same Apr 30, 2000 Issued
Array ( [id] => 4275475 [patent_doc_number] => 06281083 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-28 [patent_title] => 'Methods of forming field effect transistor gates, and methods of forming integrated circuitry' [patent_app_type] => 1 [patent_app_number] => 9/559987 [patent_app_country] => US [patent_app_date] => 2000-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2180 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/281/06281083.pdf [firstpage_image] =>[orig_patent_app_number] => 559987 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/559987
Methods of forming field effect transistor gates, and methods of forming integrated circuitry Apr 25, 2000 Issued
Array ( [id] => 4336398 [patent_doc_number] => 06333233 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-25 [patent_title] => 'Semiconductor device with self-aligned contact and its manufacture' [patent_app_type] => 1 [patent_app_number] => 9/556302 [patent_app_country] => US [patent_app_date] => 2000-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 26 [patent_no_of_words] => 5915 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 240 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/333/06333233.pdf [firstpage_image] =>[orig_patent_app_number] => 556302 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/556302
Semiconductor device with self-aligned contact and its manufacture Apr 23, 2000 Issued
Array ( [id] => 7643935 [patent_doc_number] => 06429103 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-06 [patent_title] => 'MOCVD-grown emode HIGFET buffer' [patent_app_type] => B1 [patent_app_number] => 09/548791 [patent_app_country] => US [patent_app_date] => 2000-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 1909 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 14 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/429/06429103.pdf [firstpage_image] =>[orig_patent_app_number] => 09548791 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/548791
MOCVD-grown emode HIGFET buffer Apr 12, 2000 Issued
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