
Mary Ann Calabrese
Examiner (ID: 18530, Phone: (571)272-8704 , Office: P/2913 )
| Most Active Art Unit | 2913 |
| Art Unit(s) | 2931, 2913 |
| Total Applications | 4141 |
| Issued Applications | 3855 |
| Pending Applications | 21 |
| Abandoned Applications | 276 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6327387
[patent_doc_number] => 20100327280
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-12-30
[patent_title] => 'SCALING OF BIPOLAR TRANSISTORS'
[patent_app_type] => utility
[patent_app_number] => 12/493383
[patent_app_country] => US
[patent_app_date] => 2009-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 7948
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0327/20100327280.pdf
[firstpage_image] =>[orig_patent_app_number] => 12493383
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/493383 | Scaling of bipolar transistors | Jun 28, 2009 | Issued |
Array
(
[id] => 5495915
[patent_doc_number] => 20090263943
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-10-22
[patent_title] => 'METHOD OF FABRICATING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/492276
[patent_app_country] => US
[patent_app_date] => 2009-06-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 21
[patent_no_of_words] => 6943
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0263/20090263943.pdf
[firstpage_image] =>[orig_patent_app_number] => 12492276
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/492276 | Method of fabricating semiconductor integrated circuit device | Jun 25, 2009 | Issued |
Array
(
[id] => 5461556
[patent_doc_number] => 20090321756
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-12-31
[patent_title] => 'LED Package Structure and Method of Packaging the Same'
[patent_app_type] => utility
[patent_app_number] => 12/492606
[patent_app_country] => US
[patent_app_date] => 2009-06-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 25
[patent_no_of_words] => 12571
[patent_no_of_claims] => 54
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0321/20090321756.pdf
[firstpage_image] =>[orig_patent_app_number] => 12492606
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/492606 | LED package structure and method of packaging the same | Jun 25, 2009 | Issued |
Array
(
[id] => 4624772
[patent_doc_number] => 08004073
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-08-23
[patent_title] => 'Integrated circuit packaging system with interposer and method of manufacture thereof'
[patent_app_type] => utility
[patent_app_number] => 12/486568
[patent_app_country] => US
[patent_app_date] => 2009-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 3757
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/004/08004073.pdf
[firstpage_image] =>[orig_patent_app_number] => 12486568
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/486568 | Integrated circuit packaging system with interposer and method of manufacture thereof | Jun 16, 2009 | Issued |
Array
(
[id] => 5394953
[patent_doc_number] => 20090315016
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-12-24
[patent_title] => 'ATOMIC LAYER DEPOSITION FOR FUNCTIONALIZING COLLOIDAL AND SEMICONDUCTOR PARTICLES'
[patent_app_type] => utility
[patent_app_number] => 12/485784
[patent_app_country] => US
[patent_app_date] => 2009-06-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 4869
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0315/20090315016.pdf
[firstpage_image] =>[orig_patent_app_number] => 12485784
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/485784 | Atomic layer deposition for functionalizing colloidal and semiconductor particles | Jun 15, 2009 | Issued |
Array
(
[id] => 5569857
[patent_doc_number] => 20090253235
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-10-08
[patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE WITH OFFSET SIDEWALL STRUCTURE'
[patent_app_type] => utility
[patent_app_number] => 12/484618
[patent_app_country] => US
[patent_app_date] => 2009-06-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 24
[patent_no_of_words] => 12108
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0253/20090253235.pdf
[firstpage_image] =>[orig_patent_app_number] => 12484618
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/484618 | Method of manufacturing semiconductor device with offset sidewall structure | Jun 14, 2009 | Issued |
Array
(
[id] => 54067
[patent_doc_number] => 07772643
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-08-10
[patent_title] => 'Methods of fabricating semiconductor device having a metal gate pattern'
[patent_app_type] => utility
[patent_app_number] => 12/457323
[patent_app_country] => US
[patent_app_date] => 2009-06-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 14
[patent_no_of_words] => 6334
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/772/07772643.pdf
[firstpage_image] =>[orig_patent_app_number] => 12457323
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/457323 | Methods of fabricating semiconductor device having a metal gate pattern | Jun 7, 2009 | Issued |
Array
(
[id] => 7518777
[patent_doc_number] => 07972878
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-07-05
[patent_title] => 'Quantum dot memory'
[patent_app_type] => utility
[patent_app_number] => 12/478084
[patent_app_country] => US
[patent_app_date] => 2009-06-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 12
[patent_no_of_words] => 8692
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/972/07972878.pdf
[firstpage_image] =>[orig_patent_app_number] => 12478084
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/478084 | Quantum dot memory | Jun 3, 2009 | Issued |
Array
(
[id] => 5533628
[patent_doc_number] => 20090233416
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-09-17
[patent_title] => 'FLASH MEMORY DEVICES COMPRISING PILLAR PATTERNS AND METHODS OF FABRICATING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/471521
[patent_app_country] => US
[patent_app_date] => 2009-05-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 6718
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0233/20090233416.pdf
[firstpage_image] =>[orig_patent_app_number] => 12471521
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/471521 | FLASH MEMORY DEVICES COMPRISING PILLAR PATTERNS AND METHODS OF FABRICATING THE SAME | May 25, 2009 | Abandoned |
Array
(
[id] => 5533645
[patent_doc_number] => 20090233433
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-09-17
[patent_title] => 'Semiconductor device having silicon layer in a gate electrode'
[patent_app_type] => utility
[patent_app_number] => 12/453737
[patent_app_country] => US
[patent_app_date] => 2009-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 5847
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0233/20090233433.pdf
[firstpage_image] =>[orig_patent_app_number] => 12453737
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/453737 | Semiconductor device having silicon layer in a gate electrode | May 19, 2009 | Issued |
Array
(
[id] => 6260510
[patent_doc_number] => 20100296691
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-11-25
[patent_title] => 'ELECTROMECHANICAL VIBRATION CONVERTER FOR TACTILE ACOUSTIC APPARATUS'
[patent_app_type] => utility
[patent_app_number] => 12/468240
[patent_app_country] => US
[patent_app_date] => 2009-05-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 23
[patent_no_of_words] => 8332
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0296/20100296691.pdf
[firstpage_image] =>[orig_patent_app_number] => 12468240
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/468240 | ELECTROMECHANICAL VIBRATION CONVERTER FOR TACTILE ACOUSTIC APPARATUS | May 18, 2009 | Abandoned |
Array
(
[id] => 4595734
[patent_doc_number] => 07981711
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-07-19
[patent_title] => 'Manufacture method of a multilayer structure having non-polar a-plane {11-20} III-nitride layer'
[patent_app_type] => utility
[patent_app_number] => 12/468138
[patent_app_country] => US
[patent_app_date] => 2009-05-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 16
[patent_no_of_words] => 3780
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 61
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/981/07981711.pdf
[firstpage_image] =>[orig_patent_app_number] => 12468138
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/468138 | Manufacture method of a multilayer structure having non-polar a-plane {11-20} III-nitride layer | May 18, 2009 | Issued |
Array
(
[id] => 5551454
[patent_doc_number] => 20090285440
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-11-19
[patent_title] => 'Electroacoustic tranducing device'
[patent_app_type] => utility
[patent_app_number] => 12/453497
[patent_app_country] => US
[patent_app_date] => 2009-05-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2646
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0285/20090285440.pdf
[firstpage_image] =>[orig_patent_app_number] => 12453497
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/453497 | Electroacoustic tranducing device | May 12, 2009 | Abandoned |
Array
(
[id] => 5551453
[patent_doc_number] => 20090285439
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-11-19
[patent_title] => 'Electroacoustic transducing device'
[patent_app_type] => utility
[patent_app_number] => 12/453496
[patent_app_country] => US
[patent_app_date] => 2009-05-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 8918
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0285/20090285439.pdf
[firstpage_image] =>[orig_patent_app_number] => 12453496
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/453496 | Electroacoustic transducing device | May 12, 2009 | Issued |
Array
(
[id] => 4546960
[patent_doc_number] => 07960267
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-06-14
[patent_title] => 'Method for making a stressed non-volatile memory device'
[patent_app_type] => utility
[patent_app_number] => 12/414778
[patent_app_country] => US
[patent_app_date] => 2009-03-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 9
[patent_no_of_words] => 3382
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/960/07960267.pdf
[firstpage_image] =>[orig_patent_app_number] => 12414778
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/414778 | Method for making a stressed non-volatile memory device | Mar 30, 2009 | Issued |
Array
(
[id] => 4612826
[patent_doc_number] => 07989257
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-08-02
[patent_title] => 'Polysilazane, method of synthesizing polysilazane, composition for manufacturing semiconductor device, and method of manufacturing semiconductor device using the composition'
[patent_app_type] => utility
[patent_app_number] => 12/415309
[patent_app_country] => US
[patent_app_date] => 2009-03-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 6484
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 51
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/989/07989257.pdf
[firstpage_image] =>[orig_patent_app_number] => 12415309
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/415309 | Polysilazane, method of synthesizing polysilazane, composition for manufacturing semiconductor device, and method of manufacturing semiconductor device using the composition | Mar 30, 2009 | Issued |
Array
(
[id] => 6345480
[patent_doc_number] => 20100248454
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-09-30
[patent_title] => 'METHOD OF FORMING FIN STRUCTURES USING A SACRIFICIAL ETCH STOP LAYER ON BULK SEMICONDUCTOR MATERIAL'
[patent_app_type] => utility
[patent_app_number] => 12/413174
[patent_app_country] => US
[patent_app_date] => 2009-03-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4988
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0248/20100248454.pdf
[firstpage_image] =>[orig_patent_app_number] => 12413174
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/413174 | Method of forming fin structures using a sacrificial etch stop layer on bulk semiconductor material | Mar 26, 2009 | Issued |
Array
(
[id] => 4599590
[patent_doc_number] => 07977257
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-07-12
[patent_title] => 'Methods of manufacturing semiconductor devices'
[patent_app_type] => utility
[patent_app_number] => 12/383810
[patent_app_country] => US
[patent_app_date] => 2009-03-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 33
[patent_figures_cnt] => 48
[patent_no_of_words] => 12232
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/977/07977257.pdf
[firstpage_image] =>[orig_patent_app_number] => 12383810
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/383810 | Methods of manufacturing semiconductor devices | Mar 26, 2009 | Issued |
Array
(
[id] => 4485685
[patent_doc_number] => 07883960
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-02-08
[patent_title] => 'Method of manufacturing semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 12/409979
[patent_app_country] => US
[patent_app_date] => 2009-03-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 22
[patent_no_of_words] => 4459
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/883/07883960.pdf
[firstpage_image] =>[orig_patent_app_number] => 12409979
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/409979 | Method of manufacturing semiconductor device | Mar 23, 2009 | Issued |
Array
(
[id] => 4619090
[patent_doc_number] => 07998808
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-08-16
[patent_title] => 'Semiconductor device fabrication using spacers'
[patent_app_type] => utility
[patent_app_number] => 12/409077
[patent_app_country] => US
[patent_app_date] => 2009-03-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 2103
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 61
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/998/07998808.pdf
[firstpage_image] =>[orig_patent_app_number] => 12409077
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/409077 | Semiconductor device fabrication using spacers | Mar 22, 2009 | Issued |