Search

Mary Ann Calabrese

Examiner (ID: 18530, Phone: (571)272-8704 , Office: P/2913 )

Most Active Art Unit
2913
Art Unit(s)
2931, 2913
Total Applications
4141
Issued Applications
3855
Pending Applications
21
Abandoned Applications
276

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5495937 [patent_doc_number] => 20090263965 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-22 [patent_title] => 'SELF-ALIGNED BARRIER LAYERS FOR INTERCONNECTS' [patent_app_type] => utility [patent_app_number] => 12/408473 [patent_app_country] => US [patent_app_date] => 2009-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 7701 [patent_no_of_claims] => 60 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0263/20090263965.pdf [firstpage_image] =>[orig_patent_app_number] => 12408473 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/408473
Self-aligned barrier layers for interconnects Mar 19, 2009 Issued
Array ( [id] => 6439056 [patent_doc_number] => 20100144155 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-10 [patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/407854 [patent_app_country] => US [patent_app_date] => 2009-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 17857 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0144/20100144155.pdf [firstpage_image] =>[orig_patent_app_number] => 12407854 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/407854
Method of manufacturing semiconductor device Mar 19, 2009 Issued
Array ( [id] => 6295041 [patent_doc_number] => 20100240163 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-23 [patent_title] => 'SUBSTRATE WITH MULTIPLE ENCAPSULATED PRESSURES' [patent_app_type] => utility [patent_app_number] => 12/407639 [patent_app_country] => US [patent_app_date] => 2009-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2476 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0240/20100240163.pdf [firstpage_image] =>[orig_patent_app_number] => 12407639 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/407639
Substrate with multiple encapsulated pressures Mar 18, 2009 Issued
Array ( [id] => 43546 [patent_doc_number] => 07776650 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-08-17 [patent_title] => 'Method for fabricating a flip chip system in package' [patent_app_type] => utility [patent_app_number] => 12/404490 [patent_app_country] => US [patent_app_date] => 2009-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3102 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/776/07776650.pdf [firstpage_image] =>[orig_patent_app_number] => 12404490 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/404490
Method for fabricating a flip chip system in package Mar 15, 2009 Issued
Array ( [id] => 4528410 [patent_doc_number] => 07923282 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-04-12 [patent_title] => 'Formation of stretchable photovoltaic devices and carriers' [patent_app_type] => utility [patent_app_number] => 12/381589 [patent_app_country] => US [patent_app_date] => 2009-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 38 [patent_no_of_words] => 16347 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/923/07923282.pdf [firstpage_image] =>[orig_patent_app_number] => 12381589 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/381589
Formation of stretchable photovoltaic devices and carriers Mar 12, 2009 Issued
Array ( [id] => 6641111 [patent_doc_number] => 20100227471 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-09 [patent_title] => 'Pseudo Hybrid Structure for Low K Interconnect Integration' [patent_app_type] => utility [patent_app_number] => 12/399372 [patent_app_country] => US [patent_app_date] => 2009-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6157 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0227/20100227471.pdf [firstpage_image] =>[orig_patent_app_number] => 12399372 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/399372
Pseudo hybrid structure for low K interconnect integration Mar 5, 2009 Issued
Array ( [id] => 4568345 [patent_doc_number] => 07858427 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-28 [patent_title] => 'Crystalline silicon solar cells on low purity substrate' [patent_app_type] => utility [patent_app_number] => 12/396909 [patent_app_country] => US [patent_app_date] => 2009-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 7012 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/858/07858427.pdf [firstpage_image] =>[orig_patent_app_number] => 12396909 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/396909
Crystalline silicon solar cells on low purity substrate Mar 2, 2009 Issued
Array ( [id] => 4499906 [patent_doc_number] => 07919349 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-04-05 [patent_title] => 'Photonic integration scheme' [patent_app_type] => utility [patent_app_number] => 12/391039 [patent_app_country] => US [patent_app_date] => 2009-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 31 [patent_no_of_words] => 4318 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/919/07919349.pdf [firstpage_image] =>[orig_patent_app_number] => 12391039 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/391039
Photonic integration scheme Feb 22, 2009 Issued
Array ( [id] => 4599553 [patent_doc_number] => 07977240 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-07-12 [patent_title] => 'Metal inks for improved contact resistance' [patent_app_type] => utility [patent_app_number] => 12/371239 [patent_app_country] => US [patent_app_date] => 2009-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 10185 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/977/07977240.pdf [firstpage_image] =>[orig_patent_app_number] => 12371239 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/371239
Metal inks for improved contact resistance Feb 12, 2009 Issued
Array ( [id] => 4442064 [patent_doc_number] => 07928007 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-04-19 [patent_title] => 'Method for reducing dielectric overetch when making contact to conductive features' [patent_app_type] => utility [patent_app_number] => 12/363588 [patent_app_country] => US [patent_app_date] => 2009-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 23 [patent_no_of_words] => 6521 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/928/07928007.pdf [firstpage_image] =>[orig_patent_app_number] => 12363588 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/363588
Method for reducing dielectric overetch when making contact to conductive features Jan 29, 2009 Issued
Array ( [id] => 6024987 [patent_doc_number] => 20110053313 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-03 [patent_title] => 'MANUFACTURING METHOD OF ORGANIC SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/863538 [patent_app_country] => US [patent_app_date] => 2009-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 17440 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0053/20110053313.pdf [firstpage_image] =>[orig_patent_app_number] => 12863538 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/863538
Manufacturing method of organic semiconductor device Jan 20, 2009 Issued
Array ( [id] => 5342878 [patent_doc_number] => 20090181528 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-16 [patent_title] => 'Method of Forming Gate Electrode' [patent_app_type] => utility [patent_app_number] => 12/345832 [patent_app_country] => US [patent_app_date] => 2008-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2434 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0181/20090181528.pdf [firstpage_image] =>[orig_patent_app_number] => 12345832 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/345832
Method of forming gate electrode Dec 29, 2008 Issued
Array ( [id] => 4451168 [patent_doc_number] => 07964491 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-06-21 [patent_title] => 'Method of forming metal wiring of nonvolatile memory device' [patent_app_type] => utility [patent_app_number] => 12/345612 [patent_app_country] => US [patent_app_date] => 2008-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 26 [patent_no_of_words] => 6789 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/964/07964491.pdf [firstpage_image] =>[orig_patent_app_number] => 12345612 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/345612
Method of forming metal wiring of nonvolatile memory device Dec 28, 2008 Issued
Array ( [id] => 5340605 [patent_doc_number] => 20090179255 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-16 [patent_title] => 'Method for forming gate oxide of semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/318392 [patent_app_country] => US [patent_app_date] => 2008-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2441 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0179/20090179255.pdf [firstpage_image] =>[orig_patent_app_number] => 12318392 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/318392
Method for forming gate oxide of semiconductor device Dec 28, 2008 Issued
Array ( [id] => 5323616 [patent_doc_number] => 20090061606 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-05 [patent_title] => 'METHOD FOR REDUCING DISLOCATION THREADING USING A SUPPRESSION IMPLANT' [patent_app_type] => utility [patent_app_number] => 12/267216 [patent_app_country] => US [patent_app_date] => 2008-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3919 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0061/20090061606.pdf [firstpage_image] =>[orig_patent_app_number] => 12267216 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/267216
Method for reducing dislocation threading using a suppression implant Nov 6, 2008 Issued
Array ( [id] => 6437000 [patent_doc_number] => 20100104127 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-29 [patent_title] => 'Loudspeaker' [patent_app_type] => utility [patent_app_number] => 12/289290 [patent_app_country] => US [patent_app_date] => 2008-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 937 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0104/20100104127.pdf [firstpage_image] =>[orig_patent_app_number] => 12289290 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/289290
Loudspeaker Oct 23, 2008 Issued
Array ( [id] => 5265047 [patent_doc_number] => 20090117732 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-07 [patent_title] => 'METHOD OF FABRICATING SEMICONDCUTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/253251 [patent_app_country] => US [patent_app_date] => 2008-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2838 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0117/20090117732.pdf [firstpage_image] =>[orig_patent_app_number] => 12253251 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/253251
METHOD OF FABRICATING SEMICONDCUTOR DEVICE Oct 16, 2008 Abandoned
Array ( [id] => 5358413 [patent_doc_number] => 20090033207 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-05 [patent_title] => 'High Quantum Efficiency Silicon Nanoparticle Embedded SiOxNy Luminescence Device' [patent_app_type] => utility [patent_app_number] => 12/249911 [patent_app_country] => US [patent_app_date] => 2008-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6725 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0033/20090033207.pdf [firstpage_image] =>[orig_patent_app_number] => 12249911 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/249911
High quantum efficiency silicon nanoparticle embedded SiOXNY luminescence device Oct 10, 2008 Issued
Array ( [id] => 7766254 [patent_doc_number] => 08116508 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-02-14 [patent_title] => 'Dual-mode loudspeaker' [patent_app_type] => utility [patent_app_number] => 12/286117 [patent_app_country] => US [patent_app_date] => 2008-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 3572 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/116/08116508.pdf [firstpage_image] =>[orig_patent_app_number] => 12286117 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/286117
Dual-mode loudspeaker Sep 25, 2008 Issued
Array ( [id] => 5378955 [patent_doc_number] => 20090190794 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-30 [patent_title] => 'ACOUSTIC TRANSDUCER' [patent_app_type] => utility [patent_app_number] => 12/239089 [patent_app_country] => US [patent_app_date] => 2008-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 7612 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0190/20090190794.pdf [firstpage_image] =>[orig_patent_app_number] => 12239089 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/239089
Acoustic transducer Sep 25, 2008 Issued
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