Search

Mathieu D Vargot

Examiner (ID: 8883, Phone: (571)272-1211 , Office: P/1742 )

Most Active Art Unit
1732
Art Unit(s)
1307, 1791, 1305, 1732, 1742, 2899
Total Applications
3255
Issued Applications
2227
Pending Applications
219
Abandoned Applications
809

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6484618 [patent_doc_number] => 20020023246 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-02-21 [patent_title] => 'Combination reed-solomon and turbo coding' [patent_app_type] => new [patent_app_number] => 09/925485 [patent_app_country] => US [patent_app_date] => 2001-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2007 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0023/20020023246.pdf [firstpage_image] =>[orig_patent_app_number] => 09925485 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/925485
Combination reed-solomon and turbo coding Aug 9, 2001 Abandoned
Array ( [id] => 6414225 [patent_doc_number] => 20020038441 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-03-28 [patent_title] => 'Multicast file transmission method' [patent_app_type] => new [patent_app_number] => 09/928137 [patent_app_country] => US [patent_app_date] => 2001-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 7891 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0038/20020038441.pdf [firstpage_image] =>[orig_patent_app_number] => 09928137 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/928137
Multicast file transmission method Aug 9, 2001 Issued
Array ( [id] => 6689842 [patent_doc_number] => 20030033568 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-13 [patent_title] => 'Method for implementing a modified radio link protocol' [patent_app_type] => new [patent_app_number] => 09/928076 [patent_app_country] => US [patent_app_date] => 2001-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4032 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0033/20030033568.pdf [firstpage_image] =>[orig_patent_app_number] => 09928076 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/928076
Method for implementing a modified radio link protocol Aug 9, 2001 Issued
Array ( [id] => 1004773 [patent_doc_number] => 06910164 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-06-21 [patent_title] => 'High-resistance contact detection test mode' [patent_app_type] => utility [patent_app_number] => 09/925721 [patent_app_country] => US [patent_app_date] => 2001-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 5550 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 29 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/910/06910164.pdf [firstpage_image] =>[orig_patent_app_number] => 09925721 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/925721
High-resistance contact detection test mode Aug 8, 2001 Issued
Array ( [id] => 6689846 [patent_doc_number] => 20030033572 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-13 [patent_title] => 'Memory system and method of using same' [patent_app_type] => new [patent_app_number] => 09/927042 [patent_app_country] => US [patent_app_date] => 2001-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8565 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0033/20030033572.pdf [firstpage_image] =>[orig_patent_app_number] => 09927042 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/927042
Systems and methods which utilize parity sets Aug 8, 2001 Issued
Array ( [id] => 6689840 [patent_doc_number] => 20030033566 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-13 [patent_title] => 'Internal cache for on chip test data storage' [patent_app_type] => new [patent_app_number] => 09/927011 [patent_app_country] => US [patent_app_date] => 2001-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5400 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 35 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0033/20030033566.pdf [firstpage_image] =>[orig_patent_app_number] => 09927011 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/927011
Internal cache for on chip test data storage Aug 8, 2001 Issued
Array ( [id] => 999192 [patent_doc_number] => 06915468 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-07-05 [patent_title] => 'Apparatus for testing computer memory' [patent_app_type] => utility [patent_app_number] => 09/925844 [patent_app_country] => US [patent_app_date] => 2001-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6173 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/915/06915468.pdf [firstpage_image] =>[orig_patent_app_number] => 09925844 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/925844
Apparatus for testing computer memory Aug 7, 2001 Issued
Array ( [id] => 1083051 [patent_doc_number] => 06836863 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-12-28 [patent_title] => 'Semiconductor memory testing method and apparatus' [patent_app_type] => B2 [patent_app_number] => 09/925138 [patent_app_country] => US [patent_app_date] => 2001-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4774 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/836/06836863.pdf [firstpage_image] =>[orig_patent_app_number] => 09925138 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/925138
Semiconductor memory testing method and apparatus Aug 7, 2001 Issued
Array ( [id] => 1004805 [patent_doc_number] => 06910173 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-06-21 [patent_title] => 'Word voter for redundant systems' [patent_app_type] => utility [patent_app_number] => 09/925278 [patent_app_country] => US [patent_app_date] => 2001-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5424 [patent_no_of_claims] => 56 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/910/06910173.pdf [firstpage_image] =>[orig_patent_app_number] => 09925278 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/925278
Word voter for redundant systems Aug 7, 2001 Issued
Array ( [id] => 1139334 [patent_doc_number] => 06789219 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-09-07 [patent_title] => 'Arrangement and method of testing an integrated circuit' [patent_app_type] => B2 [patent_app_number] => 09/923614 [patent_app_country] => US [patent_app_date] => 2001-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3603 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 262 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/789/06789219.pdf [firstpage_image] =>[orig_patent_app_number] => 09923614 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/923614
Arrangement and method of testing an integrated circuit Aug 6, 2001 Issued
Array ( [id] => 1162023 [patent_doc_number] => 06775797 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-08-10 [patent_title] => 'Method of testing an integrated circuit having a flexible timing control' [patent_app_type] => B2 [patent_app_number] => 09/923612 [patent_app_country] => US [patent_app_date] => 2001-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4025 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/775/06775797.pdf [firstpage_image] =>[orig_patent_app_number] => 09923612 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/923612
Method of testing an integrated circuit having a flexible timing control Aug 6, 2001 Issued
Array ( [id] => 1144183 [patent_doc_number] => 06785859 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-08-31 [patent_title] => 'Interleaver for variable block size' [patent_app_type] => B2 [patent_app_number] => 09/923468 [patent_app_country] => US [patent_app_date] => 2001-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2581 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/785/06785859.pdf [firstpage_image] =>[orig_patent_app_number] => 09923468 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/923468
Interleaver for variable block size Aug 5, 2001 Issued
Array ( [id] => 527483 [patent_doc_number] => 07200791 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-03 [patent_title] => 'Method and transceiving device for retransmitting erroneous information units in radio links' [patent_app_type] => utility [patent_app_number] => 10/483527 [patent_app_country] => US [patent_app_date] => 2001-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2918 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/200/07200791.pdf [firstpage_image] =>[orig_patent_app_number] => 10483527 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/483527
Method and transceiving device for retransmitting erroneous information units in radio links Jul 9, 2001 Issued
Array ( [id] => 6207359 [patent_doc_number] => 20020071367 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-13 [patent_title] => 'Apparatus and method for detecting a predetermined pattern of bits in a bitstream' [patent_app_type] => new [patent_app_number] => 09/862531 [patent_app_country] => US [patent_app_date] => 2001-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4199 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0071/20020071367.pdf [firstpage_image] =>[orig_patent_app_number] => 09862531 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/862531
Apparatus and method for detecting a predetermined pattern of bits in a bitstream May 21, 2001 Issued
Array ( [id] => 1071045 [patent_doc_number] => 06845482 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-01-18 [patent_title] => 'Interleaver for turbo decoder' [patent_app_type] => utility [patent_app_number] => 09/853332 [patent_app_country] => US [patent_app_date] => 2001-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 11538 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/845/06845482.pdf [firstpage_image] =>[orig_patent_app_number] => 09853332 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/853332
Interleaver for turbo decoder May 9, 2001 Issued
Array ( [id] => 1129808 [patent_doc_number] => 06795944 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-09-21 [patent_title] => 'Testing regularly structured logic circuits in integrated circuit devices' [patent_app_type] => B2 [patent_app_number] => 09/853106 [patent_app_country] => US [patent_app_date] => 2001-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7052 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/795/06795944.pdf [firstpage_image] =>[orig_patent_app_number] => 09853106 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/853106
Testing regularly structured logic circuits in integrated circuit devices May 9, 2001 Issued
Array ( [id] => 6707706 [patent_doc_number] => 20030154440 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-14 [patent_title] => 'Multi-rate reed-solomon encoders' [patent_app_type] => new [patent_app_number] => 09/851380 [patent_app_country] => US [patent_app_date] => 2001-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3770 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0154/20030154440.pdf [firstpage_image] =>[orig_patent_app_number] => 09851380 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/851380
Multi-rate reed-solomon encoders May 8, 2001 Issued
Array ( [id] => 6051665 [patent_doc_number] => 20020170017 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-14 [patent_title] => 'Parity mirroring between controllers in an active-active controller pair' [patent_app_type] => new [patent_app_number] => 09/852858 [patent_app_country] => US [patent_app_date] => 2001-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6450 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0170/20020170017.pdf [firstpage_image] =>[orig_patent_app_number] => 09852858 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/852858
Parity mirroring between controllers in an active-active controller pair May 8, 2001 Issued
Array ( [id] => 6051651 [patent_doc_number] => 20020170011 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-14 [patent_title] => 'Method and apparatus of boundary scan testing for AC-coupled differential data paths' [patent_app_type] => new [patent_app_number] => 09/851731 [patent_app_country] => US [patent_app_date] => 2001-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3570 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0170/20020170011.pdf [firstpage_image] =>[orig_patent_app_number] => 09851731 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/851731
Method and apparatus of boundary scan testing for AC-coupled differential data paths May 8, 2001 Issued
Array ( [id] => 6051640 [patent_doc_number] => 20020170006 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-14 [patent_title] => 'Differential receiver architecture' [patent_app_type] => new [patent_app_number] => 09/852359 [patent_app_country] => US [patent_app_date] => 2001-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6523 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0170/20020170006.pdf [firstpage_image] =>[orig_patent_app_number] => 09852359 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/852359
Differential receiver architecture May 8, 2001 Issued
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