![](/images/general/no_picture/200_user.png)
Mathieu D Vargot
Examiner (ID: 8883, Phone: (571)272-1211 , Office: P/1742 )
Most Active Art Unit | 1732 |
Art Unit(s) | 1307, 1791, 1305, 1732, 1742, 2899 |
Total Applications | 3255 |
Issued Applications | 2227 |
Pending Applications | 219 |
Abandoned Applications | 809 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 7368102
[patent_doc_number] => 20040015767
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-01-22
[patent_title] => 'Transmission apparatus and reception apparatus'
[patent_app_type] => new
[patent_app_number] => 10/380272
[patent_app_country] => US
[patent_app_date] => 2003-03-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 7035
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0015/20040015767.pdf
[firstpage_image] =>[orig_patent_app_number] => 10380272
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/380272 | Transmission apparatus and reception apparatus | Mar 11, 2003 | Abandoned |
Array
(
[id] => 609639
[patent_doc_number] => 07155657
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-12-26
[patent_title] => 'Device and method for inserting error correcting codes and for reconstructing data streams, and corresponding products'
[patent_app_type] => utility
[patent_app_number] => 10/383454
[patent_app_country] => US
[patent_app_date] => 2003-03-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 11
[patent_no_of_words] => 7514
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 131
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/155/07155657.pdf
[firstpage_image] =>[orig_patent_app_number] => 10383454
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/383454 | Device and method for inserting error correcting codes and for reconstructing data streams, and corresponding products | Mar 5, 2003 | Issued |
Array
(
[id] => 721899
[patent_doc_number] => 07055085
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-05-30
[patent_title] => 'System and method for protecting header information using dedicated CRC'
[patent_app_type] => utility
[patent_app_number] => 10/378803
[patent_app_country] => US
[patent_app_date] => 2003-03-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2455
[patent_no_of_claims] => 38
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 57
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/055/07055085.pdf
[firstpage_image] =>[orig_patent_app_number] => 10378803
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/378803 | System and method for protecting header information using dedicated CRC | Mar 3, 2003 | Issued |
Array
(
[id] => 731728
[patent_doc_number] => 07047471
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-05-16
[patent_title] => 'Voltage margin testing of bladed servers'
[patent_app_type] => utility
[patent_app_number] => 10/378248
[patent_app_country] => US
[patent_app_date] => 2003-03-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3435
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/047/07047471.pdf
[firstpage_image] =>[orig_patent_app_number] => 10378248
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/378248 | Voltage margin testing of bladed servers | Mar 2, 2003 | Issued |
Array
(
[id] => 733789
[patent_doc_number] => 07043089
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-05-09
[patent_title] => 'Overflow error diffusion'
[patent_app_type] => utility
[patent_app_number] => 10/375403
[patent_app_country] => US
[patent_app_date] => 2003-02-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 12
[patent_no_of_words] => 10626
[patent_no_of_claims] => 35
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 65
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/043/07043089.pdf
[firstpage_image] =>[orig_patent_app_number] => 10375403
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/375403 | Overflow error diffusion | Feb 26, 2003 | Issued |
Array
(
[id] => 637640
[patent_doc_number] => 07131055
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-10-31
[patent_title] => 'Fast bit-parallel Viterbi decoder add-compare-select circuit'
[patent_app_type] => utility
[patent_app_number] => 10/372121
[patent_app_country] => US
[patent_app_date] => 2003-02-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 4488
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/131/07131055.pdf
[firstpage_image] =>[orig_patent_app_number] => 10372121
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/372121 | Fast bit-parallel Viterbi decoder add-compare-select circuit | Feb 24, 2003 | Issued |
Array
(
[id] => 717099
[patent_doc_number] => 07058876
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2006-06-06
[patent_title] => 'Method and apparatus for use in a decoder of a forward error correction (FEC) system for locating bit errors in a error locator polynomial'
[patent_app_type] => utility
[patent_app_number] => 10/371708
[patent_app_country] => US
[patent_app_date] => 2003-02-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 26
[patent_no_of_words] => 17163
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/058/07058876.pdf
[firstpage_image] =>[orig_patent_app_number] => 10371708
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/371708 | Method and apparatus for use in a decoder of a forward error correction (FEC) system for locating bit errors in a error locator polynomial | Feb 21, 2003 | Issued |
Array
(
[id] => 671677
[patent_doc_number] => 07096408
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2006-08-22
[patent_title] => 'Method and apparatus for computing the error locator polynomial in a decoder of a forward error correction (FEC) system'
[patent_app_type] => utility
[patent_app_number] => 10/371121
[patent_app_country] => US
[patent_app_date] => 2003-02-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 23
[patent_no_of_words] => 16049
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/096/07096408.pdf
[firstpage_image] =>[orig_patent_app_number] => 10371121
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/371121 | Method and apparatus for computing the error locator polynomial in a decoder of a forward error correction (FEC) system | Feb 20, 2003 | Issued |
Array
(
[id] => 7333632
[patent_doc_number] => 20040255218
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-12-16
[patent_title] => 'Document retrieval method and document retrieval system'
[patent_app_type] => new
[patent_app_number] => 10/370829
[patent_app_country] => US
[patent_app_date] => 2003-02-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 25
[patent_no_of_words] => 18642
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0255/20040255218.pdf
[firstpage_image] =>[orig_patent_app_number] => 10370829
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/370829 | Document retrieval method and document retrieval system | Feb 20, 2003 | Issued |
Array
(
[id] => 739912
[patent_doc_number] => 07039854
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2006-05-02
[patent_title] => 'Method and apparatus for performing syndrome computation in a decoder of a forward error correction (FEC) system'
[patent_app_type] => utility
[patent_app_number] => 10/371563
[patent_app_country] => US
[patent_app_date] => 2003-02-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4159
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 167
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/039/07039854.pdf
[firstpage_image] =>[orig_patent_app_number] => 10371563
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/371563 | Method and apparatus for performing syndrome computation in a decoder of a forward error correction (FEC) system | Feb 20, 2003 | Issued |
Array
(
[id] => 770634
[patent_doc_number] => 07005885
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2006-02-28
[patent_title] => 'Methods and apparatus for injecting an external clock into a circuit'
[patent_app_type] => utility
[patent_app_number] => 10/370833
[patent_app_country] => US
[patent_app_date] => 2003-02-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 11
[patent_no_of_words] => 3675
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/005/07005885.pdf
[firstpage_image] =>[orig_patent_app_number] => 10370833
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/370833 | Methods and apparatus for injecting an external clock into a circuit | Feb 20, 2003 | Issued |
Array
(
[id] => 7608042
[patent_doc_number] => 07000158
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-02-14
[patent_title] => 'Simplifying verification of an SFI converter by data format adjustment'
[patent_app_type] => utility
[patent_app_number] => 10/373265
[patent_app_country] => US
[patent_app_date] => 2003-02-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 3497
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/000/07000158.pdf
[firstpage_image] =>[orig_patent_app_number] => 10373265
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/373265 | Simplifying verification of an SFI converter by data format adjustment | Feb 20, 2003 | Issued |
Array
(
[id] => 787716
[patent_doc_number] => 06990615
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-01-24
[patent_title] => 'Data processing device'
[patent_app_type] => utility
[patent_app_number] => 10/372640
[patent_app_country] => US
[patent_app_date] => 2003-02-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 6674
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/990/06990615.pdf
[firstpage_image] =>[orig_patent_app_number] => 10372640
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/372640 | Data processing device | Feb 20, 2003 | Issued |
Array
(
[id] => 792841
[patent_doc_number] => 06986097
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2006-01-10
[patent_title] => 'Method and apparatus for generating parity bits in a forward error correction (FEC) system'
[patent_app_type] => utility
[patent_app_number] => 10/371560
[patent_app_country] => US
[patent_app_date] => 2003-02-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 4287
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 43
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/986/06986097.pdf
[firstpage_image] =>[orig_patent_app_number] => 10371560
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/371560 | Method and apparatus for generating parity bits in a forward error correction (FEC) system | Feb 20, 2003 | Issued |
Array
(
[id] => 6741722
[patent_doc_number] => 20030159091
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-08-21
[patent_title] => 'Data processor'
[patent_app_type] => new
[patent_app_number] => 10/371843
[patent_app_country] => US
[patent_app_date] => 2003-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5646
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0159/20030159091.pdf
[firstpage_image] =>[orig_patent_app_number] => 10371843
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/371843 | System and method for processing digital data while buffering digital data in a buffer memory | Feb 19, 2003 | Issued |
Array
(
[id] => 739915
[patent_doc_number] => 07039855
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-05-02
[patent_title] => 'Decision function generator for a Viterbi decoder'
[patent_app_type] => utility
[patent_app_number] => 10/349664
[patent_app_country] => US
[patent_app_date] => 2003-01-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 9
[patent_no_of_words] => 4636
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 66
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/039/07039855.pdf
[firstpage_image] =>[orig_patent_app_number] => 10349664
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/349664 | Decision function generator for a Viterbi decoder | Jan 21, 2003 | Issued |
Array
(
[id] => 1021047
[patent_doc_number] => 06892344
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-05-10
[patent_title] => 'Viterbi equalizer using various hardware data paths for ACS and transmission metric operations'
[patent_app_type] => utility
[patent_app_number] => 10/336580
[patent_app_country] => US
[patent_app_date] => 2003-01-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 0
[patent_no_of_words] => 8623
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/892/06892344.pdf
[firstpage_image] =>[orig_patent_app_number] => 10336580
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/336580 | Viterbi equalizer using various hardware data paths for ACS and transmission metric operations | Jan 1, 2003 | Issued |
Array
(
[id] => 444552
[patent_doc_number] => 07260761
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-08-21
[patent_title] => 'Method and device for transferring data wherein a bit rate adaptation model is signaled between the transmitter and the receiver'
[patent_app_type] => utility
[patent_app_number] => 10/500877
[patent_app_country] => US
[patent_app_date] => 2002-12-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 6984
[patent_no_of_claims] => 39
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 134
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/260/07260761.pdf
[firstpage_image] =>[orig_patent_app_number] => 10500877
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/500877 | Method and device for transferring data wherein a bit rate adaptation model is signaled between the transmitter and the receiver | Dec 26, 2002 | Issued |
Array
(
[id] => 726361
[patent_doc_number] => 07051251
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-05-23
[patent_title] => 'Method for storing data in a write-once memory array using a write-many file system'
[patent_app_type] => utility
[patent_app_number] => 10/327680
[patent_app_country] => US
[patent_app_date] => 2002-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 23
[patent_no_of_words] => 6616
[patent_no_of_claims] => 37
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/051/07051251.pdf
[firstpage_image] =>[orig_patent_app_number] => 10327680
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/327680 | Method for storing data in a write-once memory array using a write-many file system | Dec 19, 2002 | Issued |
Array
(
[id] => 713058
[patent_doc_number] => 07062554
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2006-06-13
[patent_title] => 'Trace monitoring in a transport network'
[patent_app_type] => utility
[patent_app_number] => 10/324706
[patent_app_country] => US
[patent_app_date] => 2002-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 6232
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 54
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/062/07062554.pdf
[firstpage_image] =>[orig_patent_app_number] => 10324706
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/324706 | Trace monitoring in a transport network | Dec 19, 2002 | Issued |