Matthew C Graham

Array ( [id] => 947639 [patent_doc_number] => 06965974 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-11-15 [patent_title] => 'Dynamic partitioning of memory banks among multiple agents' [patent_app_type] => utility [patent_app_number] => 09/120126 [patent_app_country] => US [patent_app_date] => 1998-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4287 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/965/06965974.pdf [firstpage_image] =>[orig_patent_app_number] => 09120126 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4373867 [patent_doc_number] => 06202140 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-13 [patent_title] => 'Memory addressing system and method therefor' [patent_app_type] => 1 [patent_app_number] => 9/120757 [patent_app_country] => US [patent_app_date] => 1998-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2941 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/202/06202140.pdf [firstpage_image] =>[orig_patent_app_number] => 120757 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4427288 [patent_doc_number] => 06226711 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-01 [patent_title] => 'Method, apparatus and frame format to prevent data loss in a removable media library system due to incorrect configuration of devices' [patent_app_type] => 1 [patent_app_number] => 9/094054 [patent_app_country] => US [patent_app_date] => 1998-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3386 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/226/06226711.pdf [firstpage_image] =>[orig_patent_app_number] => 094054 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4426635 [patent_doc_number] => 06178489 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-23 [patent_title] => 'Method and apparatus for managing linear address mapped storage under selective compression and regency of usage constraints' [patent_app_type] => 1 [patent_app_number] => 9/093711 [patent_app_country] => US [patent_app_date] => 1998-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4540 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/178/06178489.pdf [firstpage_image] =>[orig_patent_app_number] => 093711 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1323974 [patent_doc_number] => 06611895 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-08-26 [patent_title] => 'High bandwidth cache system' [patent_app_type] => B1 [patent_app_number] => 09/093141 [patent_app_country] => US [patent_app_date] => 1998-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 6914 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/611/06611895.pdf [firstpage_image] =>[orig_patent_app_number] => 09093141 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4424096 [patent_doc_number] => 06301637 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-09 [patent_title] => 'High performance data paths' [patent_app_type] => 1 [patent_app_number] => 9/093143 [patent_app_country] => US [patent_app_date] => 1998-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4100 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/301/06301637.pdf [firstpage_image] =>[orig_patent_app_number] => 093143 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4423773 [patent_doc_number] => 06240500 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-29 [patent_title] => 'Method for dynamically placing procedures of a program in a memory' [patent_app_type] => 1 [patent_app_number] => 9/093223 [patent_app_country] => US [patent_app_date] => 1998-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3647 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/240/06240500.pdf [firstpage_image] =>[orig_patent_app_number] => 093223 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 945774 [patent_doc_number] => 06968426 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-11-22 [patent_title] => 'Scalable disc array controller' [patent_app_type] => utility [patent_app_number] => 09/700874 [patent_app_country] => US [patent_app_date] => 1998-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 83 [patent_figures_cnt] => 83 [patent_no_of_words] => 20230 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/968/06968426.pdf [firstpage_image] =>[orig_patent_app_number] => 09700874 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4351909 [patent_doc_number] => 06314499 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-06 [patent_title] => 'Non-preemptive memory locking mechanism in a shared resource system' [patent_app_type] => 1 [patent_app_number] => 9/078037 [patent_app_country] => US [patent_app_date] => 1998-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 6829 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/314/06314499.pdf [firstpage_image] =>[orig_patent_app_number] => 078037 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4298647 [patent_doc_number] => 06282618 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-28 [patent_title] => 'Secure variable storage for internet applications' [patent_app_type] => 1 [patent_app_number] => 9/075736 [patent_app_country] => US [patent_app_date] => 1998-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2852 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/282/06282618.pdf [firstpage_image] =>[orig_patent_app_number] => 075736 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7633083 [patent_doc_number] => 06658537 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-12-02 [patent_title] => 'DMA driven processor cache' [patent_app_type] => B2 [patent_app_number] => 09/075307 [patent_app_country] => US [patent_app_date] => 1998-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2207 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/658/06658537.pdf [firstpage_image] =>[orig_patent_app_number] => 09075307 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4273529 [patent_doc_number] => 06209063 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-27 [patent_title] => 'Management of the information flow within a computer system' [patent_app_type] => 1 [patent_app_number] => 9/074363 [patent_app_country] => US [patent_app_date] => 1998-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3778 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 317 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/209/06209063.pdf [firstpage_image] =>[orig_patent_app_number] => 074363 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4279968 [patent_doc_number] => 06205530 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-20 [patent_title] => 'Address translation unit supporting variable page sizes' [patent_app_type] => 1 [patent_app_number] => 9/073968 [patent_app_country] => US [patent_app_date] => 1998-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4756 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 419 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/205/06205530.pdf [firstpage_image] =>[orig_patent_app_number] => 073968 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4399186 [patent_doc_number] => 06295579 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-25 [patent_title] => 'Parallel processor system including a cache memory subsystem that has independently addressable local and remote data areas' [patent_app_type] => 1 [patent_app_number] => 9/070851 [patent_app_country] => US [patent_app_date] => 1998-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 10998 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/295/06295579.pdf [firstpage_image] =>[orig_patent_app_number] => 070851 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4422146 [patent_doc_number] => 06233655 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-15 [patent_title] => 'Method for Quad-word Storing into 2-way interleaved L1 cache' [patent_app_type] => 1 [patent_app_number] => 9/070146 [patent_app_country] => US [patent_app_date] => 1998-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1475 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/233/06233655.pdf [firstpage_image] =>[orig_patent_app_number] => 070146 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4400189 [patent_doc_number] => 06304941 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-16 [patent_title] => 'Method and apparatus for reducing processor operations when adding a new drive to a raid-6 drive group' [patent_app_type] => 1 [patent_app_number] => 9/057362 [patent_app_country] => US [patent_app_date] => 1998-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 4262 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/304/06304941.pdf [firstpage_image] =>[orig_patent_app_number] => 057362 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4412419 [patent_doc_number] => 06298428 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-02 [patent_title] => 'Method and apparatus for shared persistent virtual storage on existing operating systems' [patent_app_type] => 1 [patent_app_number] => 9/050830 [patent_app_country] => US [patent_app_date] => 1998-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8432 [patent_no_of_claims] => 58 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/298/06298428.pdf [firstpage_image] =>[orig_patent_app_number] => 050830 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1490081 [patent_doc_number] => 06366977 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-02 [patent_title] => 'Semiconductor storage device employing cluster unit data transfer scheme and data management method thereof' [patent_app_type] => B1 [patent_app_number] => 09/049060 [patent_app_country] => US [patent_app_date] => 1998-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 7431 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/366/06366977.pdf [firstpage_image] =>[orig_patent_app_number] => 09049060 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4412277 [patent_doc_number] => 06298419 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-02 [patent_title] => 'Protocol for software distributed shared memory with memory scaling' [patent_app_type] => 1 [patent_app_number] => 9/048231 [patent_app_country] => US [patent_app_date] => 1998-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 5004 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/298/06298419.pdf [firstpage_image] =>[orig_patent_app_number] => 048231 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1434049 [patent_doc_number] => 06341339 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-22 [patent_title] => 'Apparatus and method for maintaining data coherence within a cluster of symmetric multiprocessors' [patent_app_type] => B1 [patent_app_number] => 09/048232 [patent_app_country] => US [patent_app_date] => 1998-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4118 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/341/06341339.pdf [firstpage_image] =>[orig_patent_app_number] => 09048232 [rel_patent_id] =>[rel_patent_doc_number] =>)