Search

Matthew C Graham

Examiner (ID: 12461, Phone: (571)272-7116 , Office: P/3993 )

Most Active Art Unit
3103
Art Unit(s)
3613, 3683, 3103, 3104, 2202, 3303, 3993
Total Applications
2166
Issued Applications
1848
Pending Applications
68
Abandoned Applications
250

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 508062 [patent_doc_number] => 07210001 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-24 [patent_title] => 'Methods of and apparatus for efficient buffer cache utilization' [patent_app_type] => utility [patent_app_number] => 10/825717 [patent_app_country] => US [patent_app_date] => 2004-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 18879 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/210/07210001.pdf [firstpage_image] =>[orig_patent_app_number] => 10825717 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/825717
Methods of and apparatus for efficient buffer cache utilization Apr 15, 2004 Issued
Array ( [id] => 649029 [patent_doc_number] => 07120747 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-10-10 [patent_title] => 'Lower overhead shared cache invalidations' [patent_app_type] => utility [patent_app_number] => 10/800809 [patent_app_country] => US [patent_app_date] => 2004-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2846 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/120/07120747.pdf [firstpage_image] =>[orig_patent_app_number] => 10800809 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/800809
Lower overhead shared cache invalidations Mar 14, 2004 Issued
Array ( [id] => 563331 [patent_doc_number] => 07167947 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-01-23 [patent_title] => 'Memory post-write page closing apparatus and method' [patent_app_type] => utility [patent_app_number] => 10/801201 [patent_app_country] => US [patent_app_date] => 2004-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9132 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/167/07167947.pdf [firstpage_image] =>[orig_patent_app_number] => 10801201 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/801201
Memory post-write page closing apparatus and method Mar 14, 2004 Issued
Array ( [id] => 7148891 [patent_doc_number] => 20050120188 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-02 [patent_title] => 'Storage control apparatus, storage system, and control method for storage system' [patent_app_type] => utility [patent_app_number] => 10/795435 [patent_app_country] => US [patent_app_date] => 2004-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10219 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0120/20050120188.pdf [firstpage_image] =>[orig_patent_app_number] => 10795435 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/795435
Storage control apparatus, storage system, and control method for storage system Mar 8, 2004 Issued
Array ( [id] => 7140608 [patent_doc_number] => 20050182907 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-08-18 [patent_title] => 'Cache residence prediction' [patent_app_type] => utility [patent_app_number] => 10/779999 [patent_app_country] => US [patent_app_date] => 2004-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6348 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0182/20050182907.pdf [firstpage_image] =>[orig_patent_app_number] => 10779999 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/779999
Cache residence prediction Feb 16, 2004 Issued
Array ( [id] => 438362 [patent_doc_number] => 07263586 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-08-28 [patent_title] => 'Cache coherency for multiple independent cache of a domain' [patent_app_type] => utility [patent_app_number] => 10/779839 [patent_app_country] => US [patent_app_date] => 2004-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 5891 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/263/07263586.pdf [firstpage_image] =>[orig_patent_app_number] => 10779839 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/779839
Cache coherency for multiple independent cache of a domain Feb 16, 2004 Issued
Array ( [id] => 493739 [patent_doc_number] => 07219199 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-05-15 [patent_title] => 'System and method for increasing bandwidth in a directory based high speed memory system' [patent_app_type] => utility [patent_app_number] => 10/769012 [patent_app_country] => US [patent_app_date] => 2004-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 12954 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/219/07219199.pdf [firstpage_image] =>[orig_patent_app_number] => 10769012 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/769012
System and method for increasing bandwidth in a directory based high speed memory system Jan 29, 2004 Issued
Array ( [id] => 7006752 [patent_doc_number] => 20050172065 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-08-04 [patent_title] => 'Data move method and apparatus' [patent_app_type] => utility [patent_app_number] => 10/769016 [patent_app_country] => US [patent_app_date] => 2004-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 12944 [patent_no_of_claims] => 102 [patent_no_of_ind_claims] => 20 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0172/20050172065.pdf [firstpage_image] =>[orig_patent_app_number] => 10769016 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/769016
Data move method and apparatus Jan 29, 2004 Issued
Array ( [id] => 423656 [patent_doc_number] => 07275129 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-09-25 [patent_title] => 'Accessing multiple copies of RAM distributed throughout an ASIC/FPGA and maintaining their content consistency' [patent_app_type] => utility [patent_app_number] => 10/768925 [patent_app_country] => US [patent_app_date] => 2004-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 2902 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/275/07275129.pdf [firstpage_image] =>[orig_patent_app_number] => 10768925 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/768925
Accessing multiple copies of RAM distributed throughout an ASIC/FPGA and maintaining their content consistency Jan 29, 2004 Issued
Array ( [id] => 7417281 [patent_doc_number] => 20040177128 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-09 [patent_title] => 'Streamlined portable data exchange device and method' [patent_app_type] => new [patent_app_number] => 10/769400 [patent_app_country] => US [patent_app_date] => 2004-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 10359 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0177/20040177128.pdf [firstpage_image] =>[orig_patent_app_number] => 10769400 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/769400
Streamlined portable data exchange device and method Jan 29, 2004 Abandoned
Array ( [id] => 539351 [patent_doc_number] => 07188211 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-03-06 [patent_title] => 'Block programmable priority encoder in a CAM' [patent_app_type] => utility [patent_app_number] => 10/724576 [patent_app_country] => US [patent_app_date] => 2003-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 6333 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/188/07188211.pdf [firstpage_image] =>[orig_patent_app_number] => 10724576 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/724576
Block programmable priority encoder in a CAM Nov 30, 2003 Issued
Array ( [id] => 7148913 [patent_doc_number] => 20050120193 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-02 [patent_title] => 'Context look ahead storage structures' [patent_app_type] => utility [patent_app_number] => 10/724815 [patent_app_country] => US [patent_app_date] => 2003-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 8809 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0120/20050120193.pdf [firstpage_image] =>[orig_patent_app_number] => 10724815 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/724815
Context look ahead storage structures Nov 30, 2003 Issued
Array ( [id] => 908409 [patent_doc_number] => 07337282 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-02-26 [patent_title] => 'Memory system and process for controlling a memory component to achieve different kinds of memory characteristics on one and the same memory component' [patent_app_type] => utility [patent_app_number] => 10/722576 [patent_app_country] => US [patent_app_date] => 2003-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 4 [patent_no_of_words] => 4167 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/337/07337282.pdf [firstpage_image] =>[orig_patent_app_number] => 10722576 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/722576
Memory system and process for controlling a memory component to achieve different kinds of memory characteristics on one and the same memory component Nov 27, 2003 Issued
Array ( [id] => 7091761 [patent_doc_number] => 20050010718 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-13 [patent_title] => 'Memory controller, semiconductor integrated circuit, and method for controlling a memory' [patent_app_type] => utility [patent_app_number] => 10/717570 [patent_app_country] => US [patent_app_date] => 2003-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6276 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0010/20050010718.pdf [firstpage_image] =>[orig_patent_app_number] => 10717570 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/717570
Memory controller, semiconductor integrated circuit, and method for controlling a memory Nov 20, 2003 Issued
Array ( [id] => 534234 [patent_doc_number] => 07194573 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-03-20 [patent_title] => 'CAM-based search engine devices having advanced search and learn instruction handling' [patent_app_type] => utility [patent_app_number] => 10/721036 [patent_app_country] => US [patent_app_date] => 2003-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 22 [patent_no_of_words] => 12489 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/194/07194573.pdf [firstpage_image] =>[orig_patent_app_number] => 10721036 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/721036
CAM-based search engine devices having advanced search and learn instruction handling Nov 20, 2003 Issued
Array ( [id] => 7214426 [patent_doc_number] => 20040088491 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-06 [patent_title] => 'Apparatus and method for speculative prefetching after data cache misses' [patent_app_type] => new [patent_app_number] => 10/693303 [patent_app_country] => US [patent_app_date] => 2003-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 6874 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0088/20040088491.pdf [firstpage_image] =>[orig_patent_app_number] => 10693303 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/693303
Apparatus and method for speculative prefetching after data cache misses Oct 23, 2003 Issued
Array ( [id] => 882144 [patent_doc_number] => 07360054 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-04-15 [patent_title] => 'Method and apparatus for direct conveyance of physical addresses from user level code to peripheral devices in virtual memory systems' [patent_app_type] => utility [patent_app_number] => 10/693147 [patent_app_country] => US [patent_app_date] => 2003-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7769 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/360/07360054.pdf [firstpage_image] =>[orig_patent_app_number] => 10693147 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/693147
Method and apparatus for direct conveyance of physical addresses from user level code to peripheral devices in virtual memory systems Oct 22, 2003 Issued
Array ( [id] => 582200 [patent_doc_number] => 07162604 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-01-09 [patent_title] => 'Multi-user virtual tape system' [patent_app_type] => utility [patent_app_number] => 10/682380 [patent_app_country] => US [patent_app_date] => 2003-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 5110 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/162/07162604.pdf [firstpage_image] =>[orig_patent_app_number] => 10682380 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/682380
Multi-user virtual tape system Oct 7, 2003 Issued
Array ( [id] => 659286 [patent_doc_number] => 07111118 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-09-19 [patent_title] => 'High performance raid mapping' [patent_app_type] => utility [patent_app_number] => 10/681757 [patent_app_country] => US [patent_app_date] => 2003-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 5291 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/111/07111118.pdf [firstpage_image] =>[orig_patent_app_number] => 10681757 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/681757
High performance raid mapping Oct 7, 2003 Issued
Array ( [id] => 548497 [patent_doc_number] => 07185150 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-02-27 [patent_title] => 'Architectures for self-contained, mobile, memory programming' [patent_app_type] => utility [patent_app_number] => 10/665263 [patent_app_country] => US [patent_app_date] => 2003-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 19776 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/185/07185150.pdf [firstpage_image] =>[orig_patent_app_number] => 10665263 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/665263
Architectures for self-contained, mobile, memory programming Sep 21, 2003 Issued
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