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Matthew Chabak

Examiner (ID: 19229)

Most Active Art Unit
5333
Art Unit(s)
5332, 5333
Total Applications
505
Issued Applications
0
Pending Applications
505
Abandoned Applications
0

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9827793 [patent_doc_number] => 08937020 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-01-20 [patent_title] => 'Sputtering target and manufacturing method thereof, and transistor' [patent_app_type] => utility [patent_app_number] => 13/922323 [patent_app_country] => US [patent_app_date] => 2013-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 52 [patent_no_of_words] => 36148 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13922323 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/922323
Sputtering target and manufacturing method thereof, and transistor Jun 19, 2013 Issued
Array ( [id] => 10004274 [patent_doc_number] => 09048373 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-02 [patent_title] => 'Evaporation apparatus and method' [patent_app_type] => utility [patent_app_number] => 13/916852 [patent_app_country] => US [patent_app_date] => 2013-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 22 [patent_no_of_words] => 6790 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13916852 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/916852
Evaporation apparatus and method Jun 12, 2013 Issued
Array ( [id] => 10960897 [patent_doc_number] => 20140363927 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-11 [patent_title] => 'Novel Terminations and Couplings Between Chips and Substrates' [patent_app_type] => utility [patent_app_number] => 13/912652 [patent_app_country] => US [patent_app_date] => 2013-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7294 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13912652 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/912652
Terminations and couplings between chips and substrates Jun 6, 2013 Issued
Array ( [id] => 9468852 [patent_doc_number] => 08722481 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-13 [patent_title] => 'Superior integrity of high-k metal gate stacks by preserving a resist material above end caps of gate electrode structures' [patent_app_type] => utility [patent_app_number] => 13/909221 [patent_app_country] => US [patent_app_date] => 2013-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 10180 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13909221 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/909221
Superior integrity of high-k metal gate stacks by preserving a resist material above end caps of gate electrode structures Jun 3, 2013 Issued
Array ( [id] => 10953993 [patent_doc_number] => 20140357014 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-04 [patent_title] => 'HIGH EFFICIENCY SOLAR CELL USING IIIB MATERIAL TRANSITION LAYERS' [patent_app_type] => utility [patent_app_number] => 13/905753 [patent_app_country] => US [patent_app_date] => 2013-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2612 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13905753 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/905753
HIGH EFFICIENCY SOLAR CELL USING IIIB MATERIAL TRANSITION LAYERS May 29, 2013 Abandoned
Array ( [id] => 10402934 [patent_doc_number] => 20150287943 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-08 [patent_title] => 'METHOD OF PRODUCING ORGANIC PHOTOELECTRIC CONVERSION DEVICE' [patent_app_type] => utility [patent_app_number] => 14/402250 [patent_app_country] => US [patent_app_date] => 2013-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7713 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14402250 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/402250
Method of producing organic photoelectric conversion device May 23, 2013 Issued
Array ( [id] => 9051229 [patent_doc_number] => 20130248943 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-26 [patent_title] => 'EPITAXIAL SILICON GROWTH' [patent_app_type] => utility [patent_app_number] => 13/898957 [patent_app_country] => US [patent_app_date] => 2013-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 8175 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13898957 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/898957
Epitaxial silicon growth May 20, 2013 Issued
Array ( [id] => 10939535 [patent_doc_number] => 20140342556 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-20 [patent_title] => 'REUSING ACTIVE AREA MASK FOR TRENCH TRANSFER EXPOSURE' [patent_app_type] => utility [patent_app_number] => 13/897890 [patent_app_country] => US [patent_app_date] => 2013-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2696 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13897890 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/897890
Reusing active area mask for trench transfer exposure May 19, 2013 Issued
Array ( [id] => 10939450 [patent_doc_number] => 20140342471 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-20 [patent_title] => 'Variable Doping Of Solar Cells' [patent_app_type] => utility [patent_app_number] => 13/897644 [patent_app_country] => US [patent_app_date] => 2013-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4104 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13897644 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/897644
Variable Doping Of Solar Cells May 19, 2013 Abandoned
Array ( [id] => 10022264 [patent_doc_number] => 09064760 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-23 [patent_title] => 'Substrate processing based on resistivity measurements' [patent_app_type] => utility [patent_app_number] => 13/897698 [patent_app_country] => US [patent_app_date] => 2013-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3890 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13897698 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/897698
Substrate processing based on resistivity measurements May 19, 2013 Issued
Array ( [id] => 9882369 [patent_doc_number] => 08969134 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-03 [patent_title] => 'Laser ablation tape for solder interconnect formation' [patent_app_type] => utility [patent_app_number] => 13/891279 [patent_app_country] => US [patent_app_date] => 2013-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 19 [patent_no_of_words] => 3978 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13891279 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/891279
Laser ablation tape for solder interconnect formation May 9, 2013 Issued
Array ( [id] => 9038191 [patent_doc_number] => 20130240830 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-19 [patent_title] => 'DIRECT AND SEQUENTIAL FORMATION OF MONOLAYERS OF BORON NITRIDE AND GRAPHENE ON SUBSTRATES' [patent_app_type] => utility [patent_app_number] => 13/890316 [patent_app_country] => US [patent_app_date] => 2013-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 11069 [patent_no_of_claims] => 51 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13890316 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/890316
Direct and sequential formation of monolayers of boron nitride and graphene on substrates May 8, 2013 Issued
Array ( [id] => 9038350 [patent_doc_number] => 20130240988 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-19 [patent_title] => 'TRANSISTORS COMPRISING HIGH-K METAL GATE ELECTRODE STRUCTURES AND EMBEDDED STRAIN-INDUCING SEMICONDUCTOR ALLOYS FORMED IN A LATE STAGE' [patent_app_type] => utility [patent_app_number] => 13/886373 [patent_app_country] => US [patent_app_date] => 2013-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 13128 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13886373 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/886373
Transistors comprising high-K metal gate electrode structures and embedded strain-inducing semiconductor alloys formed in a late stage May 2, 2013 Issued
Array ( [id] => 9882338 [patent_doc_number] => 08969102 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-03 [patent_title] => 'Testing an electrical connection of a device cap' [patent_app_type] => utility [patent_app_number] => 13/887233 [patent_app_country] => US [patent_app_date] => 2013-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 8785 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13887233 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/887233
Testing an electrical connection of a device cap May 2, 2013 Issued
Array ( [id] => 9013853 [patent_doc_number] => 20130228817 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-05 [patent_title] => 'WAFER-LEVEL PACKAGE STRUCTURE OF LIGHT EMITTING DIODE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/866608 [patent_app_country] => US [patent_app_date] => 2013-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 10483 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13866608 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/866608
Wafer-level package structure of light emitting diode and manufacturing method thereof Apr 18, 2013 Issued
Array ( [id] => 10888102 [patent_doc_number] => 08912098 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-16 [patent_title] => 'Self-aligned carbon electronics with embedded gate electrode' [patent_app_type] => utility [patent_app_number] => 13/863017 [patent_app_country] => US [patent_app_date] => 2013-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 4719 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13863017 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/863017
Self-aligned carbon electronics with embedded gate electrode Apr 14, 2013 Issued
Array ( [id] => 9944147 [patent_doc_number] => 08993447 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-31 [patent_title] => 'LED device with improved thermal performance' [patent_app_type] => utility [patent_app_number] => 13/858785 [patent_app_country] => US [patent_app_date] => 2013-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 4371 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13858785 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/858785
LED device with improved thermal performance Apr 7, 2013 Issued
Array ( [id] => 10882994 [patent_doc_number] => 08907375 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-09 [patent_title] => 'Method of manufacturing semiconductor device, solid-state imaging device, and solid-state imaging apparatus' [patent_app_type] => utility [patent_app_number] => 13/853383 [patent_app_country] => US [patent_app_date] => 2013-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 34 [patent_no_of_words] => 7935 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13853383 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/853383
Method of manufacturing semiconductor device, solid-state imaging device, and solid-state imaging apparatus Mar 28, 2013 Issued
Array ( [id] => 8973817 [patent_doc_number] => 20130207247 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-15 [patent_title] => 'Semiconductor Device and Method of Forming a Shielding Layer Over a Semiconductor Die After Forming a Build-up Interconnect Structure' [patent_app_type] => utility [patent_app_number] => 13/845329 [patent_app_country] => US [patent_app_date] => 2013-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7139 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13845329 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/845329
Semiconductor device and method of forming a shielding layer over a semiconductor die after forming a build-up interconnect structure Mar 17, 2013 Issued
Array ( [id] => 10106508 [patent_doc_number] => 09142291 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-22 [patent_title] => 'High voltage generating circuit for resistive memory apparatus' [patent_app_type] => utility [patent_app_number] => 13/846327 [patent_app_country] => US [patent_app_date] => 2013-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3217 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13846327 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/846327
High voltage generating circuit for resistive memory apparatus Mar 17, 2013 Issued
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