Search

Matthew D. Sandifer

Examiner (ID: 13275, Phone: (571)270-5175 , Office: P/2182 )

Most Active Art Unit
2182
Art Unit(s)
2151, 2193, 2182, 2183
Total Applications
831
Issued Applications
670
Pending Applications
43
Abandoned Applications
135

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16690476 [patent_doc_number] => 20210072954 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-11 [patent_title] => RECONFIGURABLE ARITHMETIC ENGINE CIRCUIT [patent_app_type] => utility [patent_app_number] => 17/015950 [patent_app_country] => US [patent_app_date] => 2020-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 53650 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -35 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17015950 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/015950
Reconfigurable arithmetic engine circuit Sep 8, 2020 Issued
Array ( [id] => 18644595 [patent_doc_number] => 11768663 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-09-26 [patent_title] => Compaction of multiplier and adder circuits [patent_app_type] => utility [patent_app_number] => 17/014410 [patent_app_country] => US [patent_app_date] => 2020-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 17 [patent_no_of_words] => 7233 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17014410 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/014410
Compaction of multiplier and adder circuits Sep 7, 2020 Issued
Array ( [id] => 16527297 [patent_doc_number] => 20200401377 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-24 [patent_title] => Decentralized Random Number Generator [patent_app_type] => utility [patent_app_number] => 17/013299 [patent_app_country] => US [patent_app_date] => 2020-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11762 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17013299 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/013299
Decentralized random number generator Sep 3, 2020 Issued
Array ( [id] => 16515249 [patent_doc_number] => 20200394507 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-17 [patent_title] => DATA PROCESSING CIRCUIT FOR NEURAL NETWORK [patent_app_type] => utility [patent_app_number] => 17/005488 [patent_app_country] => US [patent_app_date] => 2020-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10744 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17005488 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/005488
Data processing circuit for neural network Aug 27, 2020 Issued
Array ( [id] => 17331364 [patent_doc_number] => 11221827 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-01-11 [patent_title] => In-memory computation device [patent_app_type] => utility [patent_app_number] => 17/006493 [patent_app_country] => US [patent_app_date] => 2020-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 3639 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17006493 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/006493
In-memory computation device Aug 27, 2020 Issued
Array ( [id] => 19626051 [patent_doc_number] => 12164884 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-10 [patent_title] => Tanh and sigmoid function execution [patent_app_type] => utility [patent_app_number] => 17/003334 [patent_app_country] => US [patent_app_date] => 2020-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 34 [patent_no_of_words] => 24797 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17003334 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/003334
Tanh and sigmoid function execution Aug 25, 2020 Issued
Array ( [id] => 16630332 [patent_doc_number] => 20210048985 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-18 [patent_title] => SELF-TIMED RANDOM NUMBER GENERATOR [patent_app_type] => utility [patent_app_number] => 17/000121 [patent_app_country] => US [patent_app_date] => 2020-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8609 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17000121 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/000121
Self-timed random number generator Aug 20, 2020 Issued
Array ( [id] => 18918148 [patent_doc_number] => 11880427 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-23 [patent_title] => Time-series data processing method, corresponding processing system, device and computer program product [patent_app_type] => utility [patent_app_number] => 16/998810 [patent_app_country] => US [patent_app_date] => 2020-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 8358 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 441 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16998810 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/998810
Time-series data processing method, corresponding processing system, device and computer program product Aug 19, 2020 Issued
Array ( [id] => 17543058 [patent_doc_number] => 11308182 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-19 [patent_title] => Data processing method, data processing apparatus and processing apparatus [patent_app_type] => utility [patent_app_number] => 16/996486 [patent_app_country] => US [patent_app_date] => 2020-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 22 [patent_no_of_words] => 9980 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16996486 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/996486
Data processing method, data processing apparatus and processing apparatus Aug 17, 2020 Issued
Array ( [id] => 17252817 [patent_doc_number] => 11188306 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-11-30 [patent_title] => Distributed random-number generator [patent_app_type] => utility [patent_app_number] => 16/995951 [patent_app_country] => US [patent_app_date] => 2020-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3536 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16995951 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/995951
Distributed random-number generator Aug 17, 2020 Issued
Array ( [id] => 17401541 [patent_doc_number] => 20220043631 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-10 [patent_title] => CONTROLLING CARRY-SAVE ADDERS IN MULTIPLICATION [patent_app_type] => utility [patent_app_number] => 16/985447 [patent_app_country] => US [patent_app_date] => 2020-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7556 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16985447 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/985447
Controlling carry-save adders in multiplication Aug 4, 2020 Issued
Array ( [id] => 17276497 [patent_doc_number] => 20210382695 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-09 [patent_title] => METHOD FOR GENERATING RANDOM SEQUENCE USING EXPONENTIAL FUNCTION AS RANDOM NUMBER SOURCE [patent_app_type] => utility [patent_app_number] => 16/985298 [patent_app_country] => US [patent_app_date] => 2020-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2791 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16985298 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/985298
METHOD FOR GENERATING RANDOM SEQUENCE USING EXPONENTIAL FUNCTION AS RANDOM NUMBER SOURCE Aug 4, 2020 Abandoned
Array ( [id] => 17606306 [patent_doc_number] => 11334796 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-17 [patent_title] => Optimized compute hardware for machine learning operations [patent_app_type] => utility [patent_app_number] => 16/983107 [patent_app_country] => US [patent_app_date] => 2020-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 47 [patent_figures_cnt] => 49 [patent_no_of_words] => 34491 [patent_no_of_claims] => 62 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16983107 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/983107
Optimized compute hardware for machine learning operations Aug 2, 2020 Issued
Array ( [id] => 17379783 [patent_doc_number] => 11237799 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-01 [patent_title] => Processing-in-memory (PIM) devices and methods of testing the PIM devices [patent_app_type] => utility [patent_app_number] => 16/940773 [patent_app_country] => US [patent_app_date] => 2020-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 12148 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16940773 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/940773
Processing-in-memory (PIM) devices and methods of testing the PIM devices Jul 27, 2020 Issued
Array ( [id] => 17958091 [patent_doc_number] => 20220338671 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-27 [patent_title] => INFORMATION PROCESSING DEVICE, INFORMATION PROCESSING METHOD, COOKING ROBOT, COOKING METHOD, AND COOKING EQUIPMENT [patent_app_type] => utility [patent_app_number] => 17/632028 [patent_app_country] => US [patent_app_date] => 2020-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9970 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17632028 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/632028
INFORMATION PROCESSING DEVICE, INFORMATION PROCESSING METHOD, COOKING ROBOT, COOKING METHOD, AND COOKING EQUIPMENT Jul 26, 2020 Pending
Array ( [id] => 17338031 [patent_doc_number] => 20220004362 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-06 [patent_title] => CIRCULAR ACCUMULATOR FOR FLOATING POINT ADDITION [patent_app_type] => utility [patent_app_number] => 16/920242 [patent_app_country] => US [patent_app_date] => 2020-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9176 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16920242 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/920242
Circular accumulator for floating point addition Jul 1, 2020 Issued
Array ( [id] => 17682383 [patent_doc_number] => 11366636 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-21 [patent_title] => Method and apparatus for efficient binary and ternary support in fused multiply-add (FMA) circuits [patent_app_type] => utility [patent_app_number] => 16/919022 [patent_app_country] => US [patent_app_date] => 2020-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 22 [patent_no_of_words] => 15229 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16919022 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/919022
Method and apparatus for efficient binary and ternary support in fused multiply-add (FMA) circuits Jun 30, 2020 Issued
Array ( [id] => 18735001 [patent_doc_number] => 11803736 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-10-31 [patent_title] => Fine-grained sparsity computations in systolic array [patent_app_type] => utility [patent_app_number] => 16/917015 [patent_app_country] => US [patent_app_date] => 2020-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 16576 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16917015 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/917015
Fine-grained sparsity computations in systolic array Jun 29, 2020 Issued
Array ( [id] => 16378344 [patent_doc_number] => 20200327186 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-15 [patent_title] => LOW LATENCY MATRIX MULTIPLY UNIT [patent_app_type] => utility [patent_app_number] => 16/915286 [patent_app_country] => US [patent_app_date] => 2020-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11260 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16915286 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/915286
Low latency matrix multiply unit Jun 28, 2020 Issued
Array ( [id] => 17839529 [patent_doc_number] => 20220276834 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-01 [patent_title] => SEMICONDUCTOR DEVICE INCLUDING PRODUCT-SUM OPERATION CIRCUIT AND MEMORY DEVICE, ELECTRONIC COMPONENT, AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 17/625392 [patent_app_country] => US [patent_app_date] => 2020-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 32875 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17625392 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/625392
SEMICONDUCTOR DEVICE INCLUDING PRODUCT-SUM OPERATION CIRCUIT AND MEMORY DEVICE, ELECTRONIC COMPONENT, AND ELECTRONIC DEVICE Jun 28, 2020 Pending
Menu