Search

Matthew David

Examiner (ID: 7929, Phone: (571)272-2467 , Office: P/2615 )

Most Active Art Unit
2111
Art Unit(s)
2111, 2615
Total Applications
342
Issued Applications
234
Pending Applications
0
Abandoned Applications
109

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 213299 [patent_doc_number] => 07624218 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-11-24 [patent_title] => 'System and method for DVI native and docking support' [patent_app_type] => utility [patent_app_number] => 10/689253 [patent_app_country] => US [patent_app_date] => 2003-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2065 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/624/07624218.pdf [firstpage_image] =>[orig_patent_app_number] => 10689253 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/689253
System and method for DVI native and docking support Oct 19, 2003 Issued
Array ( [id] => 7226990 [patent_doc_number] => 20050078694 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-04-14 [patent_title] => 'Packet manager interrupt mapper' [patent_app_type] => utility [patent_app_number] => 10/685017 [patent_app_country] => US [patent_app_date] => 2003-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 14129 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0078/20050078694.pdf [firstpage_image] =>[orig_patent_app_number] => 10685017 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/685017
Packet manager interrupt mapper Oct 13, 2003 Issued
Array ( [id] => 7459956 [patent_doc_number] => 20040068602 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-08 [patent_title] => 'Apparatus, method and system for accelerated graphics port bus bridges' [patent_app_type] => new [patent_app_number] => 10/679734 [patent_app_country] => US [patent_app_date] => 2003-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 13951 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0068/20040068602.pdf [firstpage_image] =>[orig_patent_app_number] => 10679734 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/679734
Apparatus, method and system for accelerated graphics port bus bridges Oct 5, 2003 Abandoned
Array ( [id] => 163261 [patent_doc_number] => 07676621 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-09 [patent_title] => 'Communications bus transceiver' [patent_app_type] => utility [patent_app_number] => 10/662034 [patent_app_country] => US [patent_app_date] => 2003-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 16676 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/676/07676621.pdf [firstpage_image] =>[orig_patent_app_number] => 10662034 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/662034
Communications bus transceiver Sep 11, 2003 Issued
Array ( [id] => 7128978 [patent_doc_number] => 20050060460 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-17 [patent_title] => 'Assigning interrupts for input/output (I/O) devices among nodes of a non-uniform memory access (NUMA) system' [patent_app_type] => utility [patent_app_number] => 10/644133 [patent_app_country] => US [patent_app_date] => 2003-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3858 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0060/20050060460.pdf [firstpage_image] =>[orig_patent_app_number] => 10644133 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/644133
Assigning interrupts for input/output (I/O) devices among nodes of a non-uniform memory access (NUMA) system Aug 19, 2003 Issued
Array ( [id] => 7300274 [patent_doc_number] => 20040215860 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-28 [patent_title] => 'Virtualization of a global interrupt queue' [patent_app_type] => new [patent_app_number] => 10/422513 [patent_app_country] => US [patent_app_date] => 2003-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4205 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0215/20040215860.pdf [firstpage_image] =>[orig_patent_app_number] => 10422513 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/422513
Virtualization of a global interrupt queue Apr 23, 2003 Issued
Array ( [id] => 497922 [patent_doc_number] => 07216195 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-05-08 [patent_title] => 'Architecture for managing disk drives' [patent_app_type] => utility [patent_app_number] => 10/402363 [patent_app_country] => US [patent_app_date] => 2003-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 30 [patent_no_of_words] => 7393 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/216/07216195.pdf [firstpage_image] =>[orig_patent_app_number] => 10402363 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/402363
Architecture for managing disk drives Mar 28, 2003 Issued
Array ( [id] => 7100247 [patent_doc_number] => 20050132109 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-16 [patent_title] => 'Method for addressing the users of a bus system by means of identification flows' [patent_app_type] => utility [patent_app_number] => 10/506297 [patent_app_country] => US [patent_app_date] => 2003-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 6003 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0132/20050132109.pdf [firstpage_image] =>[orig_patent_app_number] => 10506297 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/506297
Method for addressing the users of a bus system by means of identification flows Mar 28, 2003 Issued
Array ( [id] => 7006748 [patent_doc_number] => 20050172061 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-08-04 [patent_title] => 'Device controller' [patent_app_type] => utility [patent_app_number] => 10/486216 [patent_app_country] => US [patent_app_date] => 2003-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5842 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0172/20050172061.pdf [firstpage_image] =>[orig_patent_app_number] => 10486216 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/486216
Device controller Mar 23, 2003 Abandoned
Array ( [id] => 7605748 [patent_doc_number] => 07099974 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-29 [patent_title] => 'Method, apparatus, and system for reducing resource contention in multiprocessor systems' [patent_app_type] => utility [patent_app_number] => 10/393320 [patent_app_country] => US [patent_app_date] => 2003-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3527 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/099/07099974.pdf [firstpage_image] =>[orig_patent_app_number] => 10393320 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/393320
Method, apparatus, and system for reducing resource contention in multiprocessor systems Mar 19, 2003 Issued
Array ( [id] => 7006735 [patent_doc_number] => 20050172048 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-08-04 [patent_title] => 'Method for transmitting data via a data bus' [patent_app_type] => utility [patent_app_number] => 10/505563 [patent_app_country] => US [patent_app_date] => 2003-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5398 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0172/20050172048.pdf [firstpage_image] =>[orig_patent_app_number] => 10505563 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/505563
Method for transmitting data via a data bus Jan 19, 2003 Abandoned
Array ( [id] => 6941014 [patent_doc_number] => 20050114577 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-26 [patent_title] => 'Data transmission method serial bus system and switch-on unit for a passive station' [patent_app_type] => utility [patent_app_number] => 10/499724 [patent_app_country] => US [patent_app_date] => 2002-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5746 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0114/20050114577.pdf [firstpage_image] =>[orig_patent_app_number] => 10499724 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/499724
Data transmission method serial bus system and switch-on unit for a passive station Dec 16, 2002 Issued
Array ( [id] => 7123705 [patent_doc_number] => 20050015534 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-20 [patent_title] => 'Wireless peripheral interface with universal serial bus port' [patent_app_type] => utility [patent_app_number] => 10/498304 [patent_app_country] => US [patent_app_date] => 2002-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2396 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0015/20050015534.pdf [firstpage_image] =>[orig_patent_app_number] => 10498304 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/498304
Wireless peripheral interface with universal serial bus port Dec 4, 2002 Issued
Array ( [id] => 7376406 [patent_doc_number] => 20040028164 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-12 [patent_title] => 'System and method for data transition control in a multirate communication system' [patent_app_type] => new [patent_app_number] => 10/282849 [patent_app_country] => US [patent_app_date] => 2002-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 12547 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0028/20040028164.pdf [firstpage_image] =>[orig_patent_app_number] => 10282849 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/282849
System and method for data transition control in a multirate communication system Oct 28, 2002 Abandoned
Array ( [id] => 6652181 [patent_doc_number] => 20030076778 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-24 [patent_title] => 'Duplication apparatus of cPCI system' [patent_app_type] => new [patent_app_number] => 10/277665 [patent_app_country] => US [patent_app_date] => 2002-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2169 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0076/20030076778.pdf [firstpage_image] =>[orig_patent_app_number] => 10277665 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/277665
Duplication apparatus of cPCI system Oct 22, 2002 Abandoned
Array ( [id] => 76324 [patent_doc_number] => 07757029 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-07-13 [patent_title] => 'On the fly configuration of electronic device with attachable sub-modules' [patent_app_type] => utility [patent_app_number] => 10/492566 [patent_app_country] => US [patent_app_date] => 2002-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 4263 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 295 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/757/07757029.pdf [firstpage_image] =>[orig_patent_app_number] => 10492566 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/492566
On the fly configuration of electronic device with attachable sub-modules Oct 13, 2002 Issued
Array ( [id] => 626293 [patent_doc_number] => 07139850 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-11-21 [patent_title] => 'System for processing programmable buttons using system interrupts' [patent_app_type] => utility [patent_app_number] => 10/176967 [patent_app_country] => US [patent_app_date] => 2002-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4158 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/139/07139850.pdf [firstpage_image] =>[orig_patent_app_number] => 10176967 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/176967
System for processing programmable buttons using system interrupts Jun 20, 2002 Issued
Array ( [id] => 664445 [patent_doc_number] => 07102383 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-09-05 [patent_title] => 'Method for programming/parallel programming of onboard flash memory by multiple access bus' [patent_app_type] => utility [patent_app_number] => 10/480577 [patent_app_country] => US [patent_app_date] => 2002-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 5619 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/102/07102383.pdf [firstpage_image] =>[orig_patent_app_number] => 10480577 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/480577
Method for programming/parallel programming of onboard flash memory by multiple access bus Jun 11, 2002 Issued
Array ( [id] => 730891 [patent_doc_number] => 07047342 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-16 [patent_title] => 'Data processing structure' [patent_app_type] => utility [patent_app_number] => 10/478554 [patent_app_country] => US [patent_app_date] => 2002-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2024 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/047/07047342.pdf [firstpage_image] =>[orig_patent_app_number] => 10478554 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/478554
Data processing structure Feb 24, 2002 Issued
Array ( [id] => 188517 [patent_doc_number] => 07647445 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-01-12 [patent_title] => 'Processor bus arrangement' [patent_app_type] => utility [patent_app_number] => 10/381216 [patent_app_country] => US [patent_app_date] => 2001-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3691 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/647/07647445.pdf [firstpage_image] =>[orig_patent_app_number] => 10381216 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/381216
Processor bus arrangement Sep 20, 2001 Issued
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