| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 19952957
[patent_doc_number] => 12324346
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-06-03
[patent_title] => Display device configured to prevent propagation of cracks, and method of repairing same
[patent_app_type] => utility
[patent_app_number] => 18/741440
[patent_app_country] => US
[patent_app_date] => 2024-06-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 10
[patent_no_of_words] => 1204
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 145
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18741440
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/741440 | Display device configured to prevent propagation of cracks, and method of repairing same | Jun 11, 2024 | Issued |
Array
(
[id] => 19659710
[patent_doc_number] => 20240426775
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-12-26
[patent_title] => METHODS AND APPARATUS FOR MEASURING ANALYTES USING LARGE SCALE FET ARRAYS
[patent_app_type] => utility
[patent_app_number] => 18/732345
[patent_app_country] => US
[patent_app_date] => 2024-06-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 48072
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => 0
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18732345
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/732345 | METHODS AND APPARATUS FOR MEASURING ANALYTES USING LARGE SCALE FET ARRAYS | Jun 2, 2024 | Abandoned |
Array
(
[id] => 19900348
[patent_doc_number] => 12278288
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-04-15
[patent_title] => Fin field-effect transistor device having hybrid work function layer stack
[patent_app_type] => utility
[patent_app_number] => 18/673615
[patent_app_country] => US
[patent_app_date] => 2024-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 58
[patent_figures_cnt] => 58
[patent_no_of_words] => 7669
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 220
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18673615
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/673615 | Fin field-effect transistor device having hybrid work function layer stack | May 23, 2024 | Issued |
Array
(
[id] => 20161383
[patent_doc_number] => 12388018
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-08-12
[patent_title] => Device chip scale package including a protective layer and method of manufacturing a device chip scale package
[patent_app_type] => utility
[patent_app_number] => 18/669033
[patent_app_country] => US
[patent_app_date] => 2024-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 24
[patent_no_of_words] => 4339
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 198
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18669033
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/669033 | Device chip scale package including a protective layer and method of manufacturing a device chip scale package | May 19, 2024 | Issued |
Array
(
[id] => 19407340
[patent_doc_number] => 20240290851
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-29
[patent_title] => SEMICONDUCTOR DEVICE STRUCTURE WITH BACKSIDE CONTACT
[patent_app_type] => utility
[patent_app_number] => 18/655640
[patent_app_country] => US
[patent_app_date] => 2024-05-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12634
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18655640
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/655640 | Semiconductor nanostructures device structure with backside contact | May 5, 2024 | Issued |
Array
(
[id] => 19830044
[patent_doc_number] => 12250851
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-03-11
[patent_title] => Drive circuit array substrate including well taps provided in subset thereof, display device, and electronic apparatus
[patent_app_type] => utility
[patent_app_number] => 18/651194
[patent_app_country] => US
[patent_app_date] => 2024-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 37
[patent_figures_cnt] => 38
[patent_no_of_words] => 11274
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 293
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18651194
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/651194 | Drive circuit array substrate including well taps provided in subset thereof, display device, and electronic apparatus | Apr 29, 2024 | Issued |
Array
(
[id] => 19812421
[patent_doc_number] => 12243834
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-03-04
[patent_title] => Semiconductor package with EMI shield and fabricating method thereof
[patent_app_type] => utility
[patent_app_number] => 18/642214
[patent_app_country] => US
[patent_app_date] => 2024-04-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 16
[patent_no_of_words] => 4927
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18642214
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/642214 | Semiconductor package with EMI shield and fabricating method thereof | Apr 21, 2024 | Issued |
Array
(
[id] => 20113256
[patent_doc_number] => 12364012
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-07-15
[patent_title] => Array substrate and manufacturing method thereof including via hole to facilitate dehydrogenation, display panel, and display device
[patent_app_type] => utility
[patent_app_number] => 18/618109
[patent_app_country] => US
[patent_app_date] => 2024-03-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 25
[patent_no_of_words] => 4503
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 182
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18618109
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/618109 | Array substrate and manufacturing method thereof including via hole to facilitate dehydrogenation, display panel, and display device | Mar 26, 2024 | Issued |
Array
(
[id] => 19366135
[patent_doc_number] => 20240268169
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-08
[patent_title] => DISPLAY SUBSTRATE AND MANUFACTURING METHOD THEREOF, AND DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/618420
[patent_app_country] => US
[patent_app_date] => 2024-03-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 22634
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 329
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18618420
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/618420 | Display substrate including configuration of insulation layers covering contact pads in bonding region, and manufacturing method thereof | Mar 26, 2024 | Issued |
Array
(
[id] => 19966777
[patent_doc_number] => 12336317
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-06-17
[patent_title] => Solid-state imaging device and electronic device including coupling structures for electrically interconnecting stacked semiconductor substrates
[patent_app_type] => utility
[patent_app_number] => 18/581727
[patent_app_country] => US
[patent_app_date] => 2024-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 72
[patent_figures_cnt] => 74
[patent_no_of_words] => 32521
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 145
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18581727
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/581727 | Solid-state imaging device and electronic device including coupling structures for electrically interconnecting stacked semiconductor substrates | Feb 19, 2024 | Issued |
Array
(
[id] => 19952934
[patent_doc_number] => 12324322
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-06-03
[patent_title] => Method for manufacturing display device including second interlayer insulating layer overlapping active layer of driving transistor and not overlapping active layer of switching transistor
[patent_app_type] => utility
[patent_app_number] => 18/434812
[patent_app_country] => US
[patent_app_date] => 2024-02-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 5661
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 155
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18434812
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/434812 | Method for manufacturing display device including second interlayer insulating layer overlapping active layer of driving transistor and not overlapping active layer of switching transistor | Feb 6, 2024 | Issued |
Array
(
[id] => 19765998
[patent_doc_number] => 12224301
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-02-11
[patent_title] => Back side illumination image sensors and electronic device including the same
[patent_app_type] => utility
[patent_app_number] => 18/398981
[patent_app_country] => US
[patent_app_date] => 2023-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 16
[patent_no_of_words] => 14330
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18398981
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/398981 | Back side illumination image sensors and electronic device including the same | Dec 27, 2023 | Issued |
Array
(
[id] => 19705001
[patent_doc_number] => 12199048
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-01-14
[patent_title] => Heterogeneous nested interposer package for IC chips
[patent_app_type] => utility
[patent_app_number] => 18/397915
[patent_app_country] => US
[patent_app_date] => 2023-12-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 27
[patent_no_of_words] => 6844
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 186
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18397915
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/397915 | Heterogeneous nested interposer package for IC chips | Dec 26, 2023 | Issued |
Array
(
[id] => 19721963
[patent_doc_number] => 12207522
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-01-21
[patent_title] => Display apparatus and method of manufacturing the same including cutting substrate and black matrix at tip end of blocking layer
[patent_app_type] => utility
[patent_app_number] => 18/395414
[patent_app_country] => US
[patent_app_date] => 2023-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 11356
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 118
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18395414
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/395414 | Display apparatus and method of manufacturing the same including cutting substrate and black matrix at tip end of blocking layer | Dec 21, 2023 | Issued |
Array
(
[id] => 19972514
[patent_doc_number] => 12341135
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-06-24
[patent_title] => Semiconductor device comprising PN junction diode and Schottky barrier diode
[patent_app_type] => utility
[patent_app_number] => 18/544771
[patent_app_country] => US
[patent_app_date] => 2023-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 10594
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 186
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18544771
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/544771 | Semiconductor device comprising PN junction diode and Schottky barrier diode | Dec 18, 2023 | Issued |
Array
(
[id] => 19580746
[patent_doc_number] => 12146853
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-11-19
[patent_title] => Methods and apparatus including array of reaction chambers over array of chemFET sensors for measuring analytes
[patent_app_type] => utility
[patent_app_number] => 18/536131
[patent_app_country] => US
[patent_app_date] => 2023-12-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 129
[patent_figures_cnt] => 174
[patent_no_of_words] => 92887
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 137
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18536131
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/536131 | Methods and apparatus including array of reaction chambers over array of chemFET sensors for measuring analytes | Dec 10, 2023 | Issued |
Array
(
[id] => 19966757
[patent_doc_number] => 12336296
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-06-17
[patent_title] => Semiconductor device including source/drain contact having height below gate stack
[patent_app_type] => utility
[patent_app_number] => 18/526395
[patent_app_country] => US
[patent_app_date] => 2023-12-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 3954
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 89
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18526395
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/526395 | Semiconductor device including source/drain contact having height below gate stack | Nov 30, 2023 | Issued |
Array
(
[id] => 19057105
[patent_doc_number] => 20240099074
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-21
[patent_title] => DISPLAY DEVICE AND METHOD OF PROVIDING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/520805
[patent_app_country] => US
[patent_app_date] => 2023-11-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16904
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -2
[patent_words_short_claim] => 126
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18520805
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/520805 | Display device including color absorbing layer between capping and bank layers for improving color matching, and method of providing the same | Nov 27, 2023 | Issued |
Array
(
[id] => 19888331
[patent_doc_number] => 12274080
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-04-08
[patent_title] => High electron mobility transistor including conductive plate filling trenches in passivation layer, and method for forming the same
[patent_app_type] => utility
[patent_app_number] => 18/506101
[patent_app_country] => US
[patent_app_date] => 2023-11-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 18
[patent_no_of_words] => 6812
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18506101
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/506101 | High electron mobility transistor including conductive plate filling trenches in passivation layer, and method for forming the same | Nov 8, 2023 | Issued |
Array
(
[id] => 19073410
[patent_doc_number] => 20240107836
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-28
[patent_title] => DISPLAY PANEL, A METHOD FOR MANUFACTURING THE SAME, AND A DISPLAY DEVICE INCLUDING THE DISPLAY PANEL
[patent_app_type] => utility
[patent_app_number] => 18/387088
[patent_app_country] => US
[patent_app_date] => 2023-11-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9326
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18387088
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/387088 | Display panel with substrate having a through hole including therein a conductive part and a resin part, a method for manufacturing the same, and a display device including the display panel | Nov 5, 2023 | Issued |