Matthew E. Gordon

Array ( [id] => 24948 [patent_doc_number] => 07795704 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-09-14 [patent_title] => 'Die seal ring and wafer having the same' [patent_app_type] => utility [patent_app_number] => 11/771122 [patent_app_country] => US [patent_app_date] => 2007-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1958 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/795/07795704.pdf [firstpage_image] =>[orig_patent_app_number] => 11771122 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4648781 [patent_doc_number] => 20080036036 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-14 [patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 11/771212 [patent_app_country] => US [patent_app_date] => 2007-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3702 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0036/20080036036.pdf [firstpage_image] =>[orig_patent_app_number] => 11771212 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5346195 [patent_doc_number] => 20090001556 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-01 [patent_title] => 'LOW TEMPERATURE THERMAL INTERFACE MATERIALS' [patent_app_type] => utility [patent_app_number] => 11/771872 [patent_app_country] => US [patent_app_date] => 2007-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1288 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20090001556.pdf [firstpage_image] =>[orig_patent_app_number] => 11771872 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5346145 [patent_doc_number] => 20090001506 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-01 [patent_title] => 'DUAL STRESS LINER EFUSE' [patent_app_type] => utility [patent_app_number] => 11/771172 [patent_app_country] => US [patent_app_date] => 2007-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1713 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20090001506.pdf [firstpage_image] =>[orig_patent_app_number] => 11771172 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4503446 [patent_doc_number] => 07919805 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-04-05 [patent_title] => 'Non-volatile memory cell with two capacitors and one PNP transistor and a method of forming such a cell in a 1-poly SOI technology' [patent_app_type] => utility [patent_app_number] => 11/807322 [patent_app_country] => US [patent_app_date] => 2007-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3735 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/919/07919805.pdf [firstpage_image] =>[orig_patent_app_number] => 11807322 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4582986 [patent_doc_number] => 07834400 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-16 [patent_title] => 'Semiconductor structure for protecting an internal integrated circuit and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/798212 [patent_app_country] => US [patent_app_date] => 2007-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5023 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/834/07834400.pdf [firstpage_image] =>[orig_patent_app_number] => 11798212 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 111722 [patent_doc_number] => 07718533 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-18 [patent_title] => 'Inverted variable resistance memory cell and method of making the same' [patent_app_type] => utility [patent_app_number] => 11/797872 [patent_app_country] => US [patent_app_date] => 2007-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 5074 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/718/07718533.pdf [firstpage_image] =>[orig_patent_app_number] => 11797872 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8572270 [patent_doc_number] => 08338920 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-25 [patent_title] => 'Package integrated soft magnetic film for improvement in on-chip inductor performance' [patent_app_type] => utility [patent_app_number] => 11/690682 [patent_app_country] => US [patent_app_date] => 2007-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 3346 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11690682 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4836868 [patent_doc_number] => 20080277760 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-13 [patent_title] => 'INTEGRATED CIRCUIT DEVICE HAVING OPENINGS IN A LAYERED STRUCTURE' [patent_app_type] => utility [patent_app_number] => 11/744962 [patent_app_country] => US [patent_app_date] => 2007-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4929 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0277/20080277760.pdf [firstpage_image] =>[orig_patent_app_number] => 11744962 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9828162 [patent_doc_number] => 08937393 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-01-20 [patent_title] => 'Integrated circuit package system with device cavity' [patent_app_type] => utility [patent_app_number] => 11/744062 [patent_app_country] => US [patent_app_date] => 2007-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 31 [patent_no_of_words] => 8252 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11744062 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4958044 [patent_doc_number] => 20080272468 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-06 [patent_title] => 'GROUNDED SHIELD FOR BLOCKING ELECTROMAGNETIC INTERFERENCE IN AN INTEGRATED CIRCUIT PACKAGE' [patent_app_type] => utility [patent_app_number] => 11/743162 [patent_app_country] => US [patent_app_date] => 2007-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3687 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0272/20080272468.pdf [firstpage_image] =>[orig_patent_app_number] => 11743162 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4457634 [patent_doc_number] => 07893490 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-02-22 [patent_title] => 'HVNMOS structure for reducing on-resistance and preventing BJT triggering' [patent_app_type] => utility [patent_app_number] => 11/796832 [patent_app_country] => US [patent_app_date] => 2007-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 3267 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/893/07893490.pdf [firstpage_image] =>[orig_patent_app_number] => 11796832 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4526875 [patent_doc_number] => 07952167 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-31 [patent_title] => 'Scribe line layout design' [patent_app_type] => utility [patent_app_number] => 11/796202 [patent_app_country] => US [patent_app_date] => 2007-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3814 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/952/07952167.pdf [firstpage_image] =>[orig_patent_app_number] => 11796202 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 91942 [patent_doc_number] => 07732276 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-08 [patent_title] => 'Self-aligned patterning method by using non-conformal film and etch back for flash memory and other semiconductor applications' [patent_app_type] => utility [patent_app_number] => 11/796582 [patent_app_country] => US [patent_app_date] => 2007-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 20 [patent_no_of_words] => 6504 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/732/07732276.pdf [firstpage_image] =>[orig_patent_app_number] => 11796582 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14353 [patent_doc_number] => 07808005 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-10-05 [patent_title] => 'Light-emitting device with photonic grating configured for extracting light from light-emitting structure' [patent_app_type] => utility [patent_app_number] => 11/789872 [patent_app_country] => US [patent_app_date] => 2007-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 5538 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/808/07808005.pdf [firstpage_image] =>[orig_patent_app_number] => 11789872 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5208253 [patent_doc_number] => 20070246837 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-25 [patent_title] => 'IC chip package with minimized packaged-volume' [patent_app_type] => utility [patent_app_number] => 11/785452 [patent_app_country] => US [patent_app_date] => 2007-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 7755 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0246/20070246837.pdf [firstpage_image] =>[orig_patent_app_number] => 11785452 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5208241 [patent_doc_number] => 20070246825 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-25 [patent_title] => 'HIGH FREQUENCY MODULE USING METAL-WALL AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/736201 [patent_app_country] => US [patent_app_date] => 2007-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2691 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0246/20070246825.pdf [firstpage_image] =>[orig_patent_app_number] => 11736201 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9889496 [patent_doc_number] => 08975756 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-10 [patent_title] => 'Electric terminal device and method of connecting the same' [patent_app_type] => utility [patent_app_number] => 11/783932 [patent_app_country] => US [patent_app_date] => 2007-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3169 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11783932 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 169625 [patent_doc_number] => 07667272 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-02-23 [patent_title] => 'Semiconductor device including a current mirror circuit' [patent_app_type] => utility [patent_app_number] => 11/783622 [patent_app_country] => US [patent_app_date] => 2007-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 44 [patent_figures_cnt] => 63 [patent_no_of_words] => 16829 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/667/07667272.pdf [firstpage_image] =>[orig_patent_app_number] => 11783622 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5245223 [patent_doc_number] => 20070241457 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-18 [patent_title] => 'Semiconductor apparatus and method of producing the same' [patent_app_type] => utility [patent_app_number] => 11/783512 [patent_app_country] => US [patent_app_date] => 2007-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 36 [patent_no_of_words] => 23288 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0241/20070241457.pdf [firstpage_image] =>[orig_patent_app_number] => 11783512 [rel_patent_id] =>[rel_patent_doc_number] =>)