Matthew E. Warren

Array ( [id] => 14938825 [patent_doc_number] => 20190305051 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-03 [patent_title] => LIGHT-EMITTING DEVICE, DISPLAY APPARATUS, AND IMAGE PICKUP APPARATUS [patent_app_type] => utility [patent_app_number] => 16/370541 [patent_app_country] => US [patent_app_date] => 2019-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9279 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16370541 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16048153 [patent_doc_number] => 10685961 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-16 [patent_title] => Contact formation in semiconductor devices [patent_app_type] => utility [patent_app_number] => 16/365913 [patent_app_country] => US [patent_app_date] => 2019-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 7567 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16365913 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16132935 [patent_doc_number] => 10700239 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-06-30 [patent_title] => Micro light-emitting diode [patent_app_type] => utility [patent_app_number] => 16/360035 [patent_app_country] => US [patent_app_date] => 2019-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3438 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16360035 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15889891 [patent_doc_number] => 10651303 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-12 [patent_title] => High-electron-mobility transistor devices [patent_app_type] => utility [patent_app_number] => 16/291996 [patent_app_country] => US [patent_app_date] => 2019-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 5124 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16291996 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15503441 [patent_doc_number] => 20200051909 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-13 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 16/285583 [patent_app_country] => US [patent_app_date] => 2019-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7430 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16285583 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15414991 [patent_doc_number] => 20200027818 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-23 [patent_title] => SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 16/285480 [patent_app_country] => US [patent_app_date] => 2019-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4651 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16285480 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14784841 [patent_doc_number] => 20190267318 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-29 [patent_title] => Electronic Device [patent_app_type] => utility [patent_app_number] => 16/285546 [patent_app_country] => US [patent_app_date] => 2019-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4162 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16285546 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16272497 [patent_doc_number] => 20200273985 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-27 [patent_title] => SEMICONDUCTOR DEVICE STRUCTURE AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 16/285595 [patent_app_country] => US [patent_app_date] => 2019-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6857 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16285595 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16272503 [patent_doc_number] => 20200273991 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-27 [patent_title] => SOI WAFERS AND DEVICES WITH BURIED STRESSOR [patent_app_type] => utility [patent_app_number] => 16/283578 [patent_app_country] => US [patent_app_date] => 2019-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8628 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16283578 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14446723 [patent_doc_number] => 20190181235 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-13 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/281954 [patent_app_country] => US [patent_app_date] => 2019-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13266 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16281954 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16132621 [patent_doc_number] => 10700078 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-06-30 [patent_title] => Three-dimensional flat NAND memory device having curved memory elements and methods of making the same [patent_app_type] => utility [patent_app_number] => 16/278488 [patent_app_country] => US [patent_app_date] => 2019-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 91 [patent_figures_cnt] => 121 [patent_no_of_words] => 23085 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16278488 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16256831 [patent_doc_number] => 20200266206 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-20 [patent_title] => THREE-DIMENSIONAL MEMORY DEVICE INCLUDING BIT LINES BETWEEN MEMORY ELEMENTS AND AN UNDERLYING PERIPHERAL CIRCUIT AND METHODS OF MAKING THE SAME [patent_app_type] => utility [patent_app_number] => 16/278391 [patent_app_country] => US [patent_app_date] => 2019-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20253 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16278391 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16256771 [patent_doc_number] => 20200266146 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-20 [patent_title] => BONDED ASSEMBLY INCLUDING A SEMICONDUCTOR-ON-INSULATOR DIE AND METHODS FOR MAKING THE SAME [patent_app_type] => utility [patent_app_number] => 16/278372 [patent_app_country] => US [patent_app_date] => 2019-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18931 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16278372 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16132645 [patent_doc_number] => 10700090 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-06-30 [patent_title] => Three-dimensional flat NAND memory device having curved memory elements and methods of making the same [patent_app_type] => utility [patent_app_number] => 16/278426 [patent_app_country] => US [patent_app_date] => 2019-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 91 [patent_figures_cnt] => 121 [patent_no_of_words] => 23085 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16278426 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15906527 [patent_doc_number] => 20200152784 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-14 [patent_title] => NON-VOLATILE MEMORY AND MANUFACTURING METHOD FOR THE SAME [patent_app_type] => utility [patent_app_number] => 16/278427 [patent_app_country] => US [patent_app_date] => 2019-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8254 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 356 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16278427 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15547493 [patent_doc_number] => 10573536 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-25 [patent_title] => Semiconductor package and method for fabricating base for semiconductor package [patent_app_type] => utility [patent_app_number] => 16/264250 [patent_app_country] => US [patent_app_date] => 2019-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 4392 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16264250 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15109159 [patent_doc_number] => 10475911 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-12 [patent_title] => Semiconductor device having a source region with chalcogen atoms [patent_app_type] => utility [patent_app_number] => 16/254235 [patent_app_country] => US [patent_app_date] => 2019-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8076 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16254235 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16180447 [patent_doc_number] => 20200227416 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-16 [patent_title] => 3D 1T1C STACKED DRAM STRUCTURE AND METHOD TO FABRICATE [patent_app_type] => utility [patent_app_number] => 16/247321 [patent_app_country] => US [patent_app_date] => 2019-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7991 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16247321 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14285411 [patent_doc_number] => 20190139990 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-09 [patent_title] => DISPLAY DEVICE WITH DIFFERENT CIRCUIT GROUPS [patent_app_type] => utility [patent_app_number] => 16/237864 [patent_app_country] => US [patent_app_date] => 2019-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3053 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16237864 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14285111 [patent_doc_number] => 20190139840 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-09 [patent_title] => WAFER SCALE TESTING AND INITIALIZATION OF SMALL DIE CHIPS [patent_app_type] => utility [patent_app_number] => 16/234852 [patent_app_country] => US [patent_app_date] => 2018-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4002 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16234852 [rel_patent_id] =>[rel_patent_doc_number] =>)