Search

Matthew E. Warren

Examiner (ID: 9271, Phone: (571)272-1737 , Office: P/2815 )

Most Active Art Unit
2815
Art Unit(s)
2815, 2817
Total Applications
1856
Issued Applications
1508
Pending Applications
127
Abandoned Applications
248

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 12990274 [patent_doc_number] => 20170345834 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-30 [patent_title] => SOI MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 15/163785 [patent_app_country] => US [patent_app_date] => 2016-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5109 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15163785 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/163785
SOI MEMORY DEVICE May 24, 2016 Abandoned
Array ( [id] => 11293777 [patent_doc_number] => 20160343709 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-24 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 15/159464 [patent_app_country] => US [patent_app_date] => 2016-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 60 [patent_figures_cnt] => 60 [patent_no_of_words] => 12240 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15159464 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/159464
Semiconductor device including a semiconductor extension layer between active regions May 18, 2016 Issued
Array ( [id] => 11638171 [patent_doc_number] => 09660158 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-23 [patent_title] => 'Infrared emitter' [patent_app_type] => utility [patent_app_number] => 15/159397 [patent_app_country] => US [patent_app_date] => 2016-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 5403 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 385 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15159397 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/159397
Infrared emitter May 18, 2016 Issued
Array ( [id] => 12192607 [patent_doc_number] => 09896327 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-02-20 [patent_title] => 'CMOS-MEMS structures with out-of-plane MEMS sensing gap' [patent_app_type] => utility [patent_app_number] => 15/158947 [patent_app_country] => US [patent_app_date] => 2016-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4651 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15158947 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/158947
CMOS-MEMS structures with out-of-plane MEMS sensing gap May 18, 2016 Issued
Array ( [id] => 11831798 [patent_doc_number] => 09728547 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-08-08 [patent_title] => 'Three-dimensional memory device with aluminum-containing etch stop layer for backside contact structure and method of making thereof' [patent_app_type] => utility [patent_app_number] => 15/159034 [patent_app_country] => US [patent_app_date] => 2016-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 38 [patent_no_of_words] => 17343 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15159034 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/159034
Three-dimensional memory device with aluminum-containing etch stop layer for backside contact structure and method of making thereof May 18, 2016 Issued
Array ( [id] => 14205793 [patent_doc_number] => 10270025 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-23 [patent_title] => Semiconductor structure having magnetic tunneling junction (MTJ) layer [patent_app_type] => utility [patent_app_number] => 15/159669 [patent_app_country] => US [patent_app_date] => 2016-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 8053 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15159669 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/159669
Semiconductor structure having magnetic tunneling junction (MTJ) layer May 18, 2016 Issued
Array ( [id] => 13228685 [patent_doc_number] => 10128123 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-13 [patent_title] => Substrate structure with array of micrometer scale copper pillar based structures and method for manufacturing same [patent_app_type] => utility [patent_app_number] => 15/159172 [patent_app_country] => US [patent_app_date] => 2016-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 26 [patent_no_of_words] => 6888 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15159172 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/159172
Substrate structure with array of micrometer scale copper pillar based structures and method for manufacturing same May 18, 2016 Issued
Array ( [id] => 11386004 [patent_doc_number] => 20170012060 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-12 [patent_title] => 'Array Substrate and Manufacturing Method Thereof, Display Device' [patent_app_type] => utility [patent_app_number] => 15/159130 [patent_app_country] => US [patent_app_date] => 2016-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3919 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15159130 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/159130
Array substrate and manufacturing method thereof, display device May 18, 2016 Issued
Array ( [id] => 12019795 [patent_doc_number] => 09812505 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-11-07 [patent_title] => 'Non-volatile memory device containing oxygen-scavenging material portions and method of making thereof' [patent_app_type] => utility [patent_app_number] => 15/157945 [patent_app_country] => US [patent_app_date] => 2016-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 69 [patent_no_of_words] => 17061 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15157945 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/157945
Non-volatile memory device containing oxygen-scavenging material portions and method of making thereof May 17, 2016 Issued
Array ( [id] => 11063780 [patent_doc_number] => 20160260742 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-08 [patent_title] => 'FIN ISOLATION STRUCTURES FACILITATING DIFFERENT FIN ISOLATION SCHEMES' [patent_app_type] => utility [patent_app_number] => 15/156506 [patent_app_country] => US [patent_app_date] => 2016-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7750 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15156506 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/156506
Fin isolation structures facilitating different fin isolation schemes May 16, 2016 Issued
Array ( [id] => 11050846 [patent_doc_number] => 20160247805 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-25 [patent_title] => 'METHOD OF FORMING A COMPLEMENTARY METAL OXIDE SEMICONDUCTOR STRUCTURE WITH N-TYPE AND P-TYPE FIELD EFFECT TRANSISTORS HAVING SYMMETRIC SOURCE/DRAIN JUNCTIONS AND OPTIONAL DUAL SILICIDES' [patent_app_type] => utility [patent_app_number] => 15/144924 [patent_app_country] => US [patent_app_date] => 2016-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 13908 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15144924 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/144924
Method of forming a complementary metal oxide semiconductor structure with N-type and P-type field effect transistors having symmetric source/drain junctions and optional dual silicides May 2, 2016 Issued
Array ( [id] => 11051008 [patent_doc_number] => 20160247968 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-25 [patent_title] => 'NITRIDE SEMICONDUCTOR WAFER, NITRIDE SEMICONDUCTOR ELEMENT, AND METHOD FOR MANUFACTURING NITRIDE SEMICONDUCTOR WAFER' [patent_app_type] => utility [patent_app_number] => 15/142473 [patent_app_country] => US [patent_app_date] => 2016-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 14847 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15142473 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/142473
Nitride semiconductor wafer, nitride semiconductor element, and method for manufacturing nitride semiconductor wafer Apr 28, 2016 Issued
Array ( [id] => 11883649 [patent_doc_number] => 09754830 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-09-05 [patent_title] => 'Wiring substrate, method for manufacturing wiring substrate, electronic device and method for manufacturing electronic device' [patent_app_type] => utility [patent_app_number] => 15/132790 [patent_app_country] => US [patent_app_date] => 2016-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 6991 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15132790 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/132790
Wiring substrate, method for manufacturing wiring substrate, electronic device and method for manufacturing electronic device Apr 18, 2016 Issued
Array ( [id] => 12102255 [patent_doc_number] => 09859355 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-02 [patent_title] => 'Organic lighting emitting display device including light absorbing layer and method for manufacturing same' [patent_app_type] => utility [patent_app_number] => 15/132864 [patent_app_country] => US [patent_app_date] => 2016-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8364 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15132864 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/132864
Organic lighting emitting display device including light absorbing layer and method for manufacturing same Apr 18, 2016 Issued
Array ( [id] => 11510358 [patent_doc_number] => 09601525 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-21 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 15/098473 [patent_app_country] => US [patent_app_date] => 2016-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 34 [patent_no_of_words] => 10613 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15098473 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/098473
Semiconductor device Apr 13, 2016 Issued
Array ( [id] => 13215203 [patent_doc_number] => 10121980 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-06 [patent_title] => Thin film transistor array panel and manufacturing method of the same [patent_app_type] => utility [patent_app_number] => 15/113581 [patent_app_country] => US [patent_app_date] => 2016-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 5510 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 302 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15113581 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/113581
Thin film transistor array panel and manufacturing method of the same Apr 7, 2016 Issued
Array ( [id] => 12250091 [patent_doc_number] => 09922873 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-03-20 [patent_title] => 'High speed, high density, low power die interconnect system' [patent_app_type] => utility [patent_app_number] => 15/091990 [patent_app_country] => US [patent_app_date] => 2016-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 32 [patent_no_of_words] => 19602 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15091990 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/091990
High speed, high density, low power die interconnect system Apr 5, 2016 Issued
Array ( [id] => 13057067 [patent_doc_number] => 10049931 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-14 [patent_title] => Method of manufacturing a semiconductor device including through silicon plugs [patent_app_type] => utility [patent_app_number] => 15/069474 [patent_app_country] => US [patent_app_date] => 2016-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 39 [patent_no_of_words] => 8075 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15069474 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/069474
Method of manufacturing a semiconductor device including through silicon plugs Mar 13, 2016 Issued
Array ( [id] => 13293251 [patent_doc_number] => 10157826 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-18 [patent_title] => Semiconductor device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 15/061627 [patent_app_country] => US [patent_app_date] => 2016-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 3898 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15061627 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/061627
Semiconductor device and manufacturing method thereof Mar 3, 2016 Issued
Array ( [id] => 13293251 [patent_doc_number] => 10157826 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-18 [patent_title] => Semiconductor device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 15/061627 [patent_app_country] => US [patent_app_date] => 2016-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 3898 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15061627 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/061627
Semiconductor device and manufacturing method thereof Mar 3, 2016 Issued
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