Search

Matthew E. Warren

Examiner (ID: 9293)

Most Active Art Unit
2815
Art Unit(s)
2817, 2815
Total Applications
1867
Issued Applications
1521
Pending Applications
123
Abandoned Applications
248

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13893549 [patent_doc_number] => 10199330 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-02-05 [patent_title] => Alignment mark arrangement, semiconductor workpiece, and method for aligning a wafer [patent_app_type] => utility [patent_app_number] => 14/138161 [patent_app_country] => US [patent_app_date] => 2013-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 20 [patent_no_of_words] => 8346 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14138161 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/138161
Alignment mark arrangement, semiconductor workpiece, and method for aligning a wafer Dec 22, 2013 Issued
Array ( [id] => 9663050 [patent_doc_number] => 08810034 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-19 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 14/095817 [patent_app_country] => US [patent_app_date] => 2013-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 55 [patent_no_of_words] => 19614 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 262 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14095817 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/095817
Semiconductor device and manufacturing method thereof Dec 2, 2013 Issued
Array ( [id] => 9367196 [patent_doc_number] => 20140077069 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-20 [patent_title] => 'SOLID-STATE IMAGING DEVICE WHICH CAN EXPAND DYNAMIC RANGE' [patent_app_type] => utility [patent_app_number] => 14/091480 [patent_app_country] => US [patent_app_date] => 2013-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6311 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14091480 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/091480
Solid-state imaging device which can expand dynamic range Nov 26, 2013 Issued
Array ( [id] => 9316473 [patent_doc_number] => 20140048811 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-20 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/072843 [patent_app_country] => US [patent_app_date] => 2013-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10567 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14072843 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/072843
Semiconductor device Nov 5, 2013 Issued
Array ( [id] => 9334801 [patent_doc_number] => 20140061583 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-06 [patent_title] => 'SILICON NANOTUBE MOSFET' [patent_app_type] => utility [patent_app_number] => 14/073017 [patent_app_country] => US [patent_app_date] => 2013-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4006 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14073017 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/073017
Silicon nanotube MOSFET Nov 5, 2013 Issued
Array ( [id] => 9335033 [patent_doc_number] => 20140061815 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-06 [patent_title] => 'HIGH PERFORMANCE NON-PLANAR SEMICONDUCTOR DEVICES WITH METAL FILLED INTER-FIN GAPS' [patent_app_type] => utility [patent_app_number] => 14/073366 [patent_app_country] => US [patent_app_date] => 2013-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4943 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14073366 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/073366
High performance non-planar semiconductor devices with metal filled inter-fin gaps Nov 5, 2013 Issued
Array ( [id] => 11180861 [patent_doc_number] => 09412860 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-09 [patent_title] => 'Multi-layer gate dielectric' [patent_app_type] => utility [patent_app_number] => 14/054778 [patent_app_country] => US [patent_app_date] => 2013-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2073 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14054778 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/054778
Multi-layer gate dielectric Oct 14, 2013 Issued
Array ( [id] => 13653763 [patent_doc_number] => 09853204 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-12-26 [patent_title] => MEMS component and method for encapsulating MEMS components [patent_app_type] => utility [patent_app_number] => 14/650538 [patent_app_country] => US [patent_app_date] => 2013-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 23 [patent_no_of_words] => 7649 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14650538 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/650538
MEMS component and method for encapsulating MEMS components Oct 13, 2013 Issued
Array ( [id] => 9294767 [patent_doc_number] => 20140038401 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-06 [patent_title] => 'RUTHENIUM FOR A DIELECTRIC CONTAINING A LANTHANIDE' [patent_app_type] => utility [patent_app_number] => 14/052483 [patent_app_country] => US [patent_app_date] => 2013-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9601 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14052483 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/052483
Ruthenium for a dielectric containing a lanthanide Oct 10, 2013 Issued
Array ( [id] => 9266615 [patent_doc_number] => 20140021531 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-23 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME' [patent_app_type] => utility [patent_app_number] => 14/036896 [patent_app_country] => US [patent_app_date] => 2013-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9929 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14036896 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/036896
Nonvolatile semiconductor memory device and method for manufacturing same Sep 24, 2013 Issued
Array ( [id] => 10370678 [patent_doc_number] => 20150255683 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-10 [patent_title] => 'Method for Fixing a Matrix-Free Electrophoretically Deposited Layer on a Semiconductor Chip for the Production of a Radiation-Emitting Semiconductor Component, and Radiation-Emitting Semiconductor Component' [patent_app_type] => utility [patent_app_number] => 14/428896 [patent_app_country] => US [patent_app_date] => 2013-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7033 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14428896 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/428896
Method for fixing a matrix-free electrophoretically deposited layer on a semiconductor chip for the production of a radiation-emitting semiconductor component, and radiation-emitting semiconductor component Sep 15, 2013 Issued
Array ( [id] => 9311682 [patent_doc_number] => 08652899 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-02-18 [patent_title] => 'Method of fabricating pixel structure' [patent_app_type] => utility [patent_app_number] => 13/967338 [patent_app_country] => US [patent_app_date] => 2013-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3654 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 281 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13967338 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/967338
Method of fabricating pixel structure Aug 13, 2013 Issued
13/963754 NON-VOLATILE MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME Aug 8, 2013 Abandoned
Array ( [id] => 10659781 [patent_doc_number] => 20160005925 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-07 [patent_title] => 'VERTICAL TYPE LIGHT EMITTING DEVICE HAVING TRANSPARENT ELECTRODE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/768870 [patent_app_country] => US [patent_app_date] => 2013-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6128 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14768870 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/768870
Vertical type light emitting device having transparent electrode and method of manufacturing the same Jul 29, 2013 Issued
Array ( [id] => 9171718 [patent_doc_number] => 20130313703 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-28 [patent_title] => 'SEMICONDUCTOR DEVICE HAVING WAFER-LEVEL CHIP SIZE PACKAGE' [patent_app_type] => utility [patent_app_number] => 13/947131 [patent_app_country] => US [patent_app_date] => 2013-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 10181 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13947131 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/947131
SEMICONDUCTOR DEVICE HAVING WAFER-LEVEL CHIP SIZE PACKAGE Jul 21, 2013 Abandoned
Array ( [id] => 9809746 [patent_doc_number] => 20150021690 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-22 [patent_title] => 'FIN TRANSFORMATION PROCESS AND ISOLATION STRUCTURES FACILITATING DIFFERENT FIN ISOLATION SCHEMES' [patent_app_type] => utility [patent_app_number] => 13/945415 [patent_app_country] => US [patent_app_date] => 2013-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7750 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13945415 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/945415
Fin transformation process and isolation structures facilitating different Fin isolation schemes Jul 17, 2013 Issued
Array ( [id] => 9210830 [patent_doc_number] => 20140010007 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-09 [patent_title] => 'ELECTRONIC DEVICE AND METHOD FOR FORMING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/937116 [patent_app_country] => US [patent_app_date] => 2013-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7052 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13937116 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/937116
Semiconductor device having extended buried gate Jul 7, 2013 Issued
Array ( [id] => 10144433 [patent_doc_number] => 09177242 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-03 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 13/926320 [patent_app_country] => US [patent_app_date] => 2013-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 36 [patent_no_of_words] => 15869 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13926320 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/926320
Semiconductor device and manufacturing method thereof Jun 24, 2013 Issued
Array ( [id] => 10864592 [patent_doc_number] => 08890298 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-18 [patent_title] => 'Embedded package security tamper mesh' [patent_app_type] => utility [patent_app_number] => 13/925673 [patent_app_country] => US [patent_app_date] => 2013-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 4616 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13925673 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/925673
Embedded package security tamper mesh Jun 23, 2013 Issued
Array ( [id] => 9728630 [patent_doc_number] => 20140264337 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'PACKAGING MECHANISMS FOR DIES WITH DIFFERENT SIZES OF CONNECTORS' [patent_app_type] => utility [patent_app_number] => 13/924215 [patent_app_country] => US [patent_app_date] => 2013-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8170 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13924215 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/924215
Packaging mechanisms for dies with different sizes of connectors Jun 20, 2013 Issued
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