Search

Matthew E. Warren

Examiner (ID: 9293)

Most Active Art Unit
2815
Art Unit(s)
2817, 2815
Total Applications
1867
Issued Applications
1521
Pending Applications
123
Abandoned Applications
248

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8683309 [patent_doc_number] => 20130051593 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-28 [patent_title] => 'TECHNOLOGY DELIVERY, POSITIONING AND SOUND MANAGEMENT SYSTEM AND METHOD FOR USE IN THE EAR CANAL' [patent_app_type] => utility [patent_app_number] => 13/593768 [patent_app_country] => US [patent_app_date] => 2012-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 4882 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13593768 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/593768
TECHNOLOGY DELIVERY, POSITIONING AND SOUND MANAGEMENT SYSTEM AND METHOD FOR USE IN THE EAR CANAL Aug 23, 2012 Abandoned
Array ( [id] => 8683310 [patent_doc_number] => 20130051594 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-28 [patent_title] => 'TECHNOLOGY DELIVERY, POSITIONING AND SOUND MANAGEMENT SYSTEM AND METHOD FOR USE IN THE EAR CANAL' [patent_app_type] => utility [patent_app_number] => 13/593788 [patent_app_country] => US [patent_app_date] => 2012-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 4882 [patent_no_of_claims] => 59 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13593788 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/593788
TECHNOLOGY DELIVERY, POSITIONING AND SOUND MANAGEMENT SYSTEM AND METHOD FOR USE IN THE EAR CANAL Aug 23, 2012 Abandoned
Array ( [id] => 9327873 [patent_doc_number] => 20140054655 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-27 [patent_title] => 'SEMICONDUCTOR GATE STRUCTURE AND METHOD OF FABRICATING THEREOF' [patent_app_type] => utility [patent_app_number] => 13/594100 [patent_app_country] => US [patent_app_date] => 2012-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5307 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13594100 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/594100
Semiconductor gate structure and method of fabricating thereof Aug 23, 2012 Issued
Array ( [id] => 9995772 [patent_doc_number] => 09040367 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-05-26 [patent_title] => 'Latch-up immunity nLDMOS' [patent_app_type] => utility [patent_app_number] => 13/590561 [patent_app_country] => US [patent_app_date] => 2012-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2727 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13590561 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/590561
Latch-up immunity nLDMOS Aug 20, 2012 Issued
Array ( [id] => 9327924 [patent_doc_number] => 20140054706 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-27 [patent_title] => 'MULTI-FIN FINFET DEVICE INCLUDING EPITAXIAL GROWTH BARRIER ON OUTSIDE SURFACES OF OUTERMOST FINS AND RELATED METHODS' [patent_app_type] => utility [patent_app_number] => 13/590756 [patent_app_country] => US [patent_app_date] => 2012-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2403 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13590756 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/590756
Multi-fin FINFET device including epitaxial growth barrier on outside surfaces of outermost fins and related methods Aug 20, 2012 Issued
Array ( [id] => 9132082 [patent_doc_number] => 20130292795 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-07 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/590079 [patent_app_country] => US [patent_app_date] => 2012-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2971 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13590079 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/590079
Semiconductor device having auxiliary patterns Aug 19, 2012 Issued
Array ( [id] => 8680799 [patent_doc_number] => 20130049082 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-28 [patent_title] => 'SOLID-STATE IMAGING DEVICE AND ELECTRONIC APPARATUS' [patent_app_type] => utility [patent_app_number] => 13/588469 [patent_app_country] => US [patent_app_date] => 2012-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 36852 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13588469 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/588469
Solid-state imaging device and electronic apparatus Aug 16, 2012 Issued
Array ( [id] => 9220320 [patent_doc_number] => 20140015095 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-16 [patent_title] => 'Dual Anti-Fuse' [patent_app_type] => utility [patent_app_number] => 13/548123 [patent_app_country] => US [patent_app_date] => 2012-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4548 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13548123 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/548123
Dual anti-fuse Jul 11, 2012 Issued
Array ( [id] => 11564984 [patent_doc_number] => 09627582 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-04-18 [patent_title] => 'Light-emitting diode architectures for enhanced performance' [patent_app_type] => utility [patent_app_number] => 13/536276 [patent_app_country] => US [patent_app_date] => 2012-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 48 [patent_no_of_words] => 12079 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13536276 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/536276
Light-emitting diode architectures for enhanced performance Jun 27, 2012 Issued
Array ( [id] => 10151975 [patent_doc_number] => 09184275 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-10 [patent_title] => 'Semiconductor devices with integrated hole collectors' [patent_app_type] => utility [patent_app_number] => 13/535094 [patent_app_country] => US [patent_app_date] => 2012-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 9494 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13535094 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/535094
Semiconductor devices with integrated hole collectors Jun 26, 2012 Issued
Array ( [id] => 8450771 [patent_doc_number] => 20120261717 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-10-18 [patent_title] => 'MONOLAYER DOPANT EMBEDDED STRESSOR FOR ADVANCED CMOS' [patent_app_type] => utility [patent_app_number] => 13/533499 [patent_app_country] => US [patent_app_date] => 2012-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7800 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13533499 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/533499
Monolayer dopant embedded stressor for advanced CMOS Jun 25, 2012 Issued
Array ( [id] => 9259851 [patent_doc_number] => 20130341780 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-26 [patent_title] => 'CHIP ARRANGEMENTS AND A METHOD FOR FORMING A CHIP ARRANGEMENT' [patent_app_type] => utility [patent_app_number] => 13/527668 [patent_app_country] => US [patent_app_date] => 2012-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6738 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13527668 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/527668
CHIP ARRANGEMENTS AND A METHOD FOR FORMING A CHIP ARRANGEMENT Jun 19, 2012 Abandoned
Array ( [id] => 10015853 [patent_doc_number] => 09058873 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-16 [patent_title] => 'Memory element having ion source layers with different contents of a chalcogen element' [patent_app_type] => utility [patent_app_number] => 13/527764 [patent_app_country] => US [patent_app_date] => 2012-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 25 [patent_no_of_words] => 14422 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 314 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13527764 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/527764
Memory element having ion source layers with different contents of a chalcogen element Jun 19, 2012 Issued
Array ( [id] => 9259756 [patent_doc_number] => 20130341685 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-26 [patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/527608 [patent_app_country] => US [patent_app_date] => 2012-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 7911 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13527608 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/527608
Semiconductor device and manufacturing method thereof Jun 19, 2012 Issued
Array ( [id] => 9259747 [patent_doc_number] => 20130341676 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-26 [patent_title] => 'Methods and Apparatus for Increased Holding Voltage in Silicon Controlled Rectifiers for ESD Protection' [patent_app_type] => utility [patent_app_number] => 13/527833 [patent_app_country] => US [patent_app_date] => 2012-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5011 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13527833 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/527833
Methods and apparatus for increased holding voltage in silicon controlled rectifiers for ESD protection Jun 19, 2012 Issued
Array ( [id] => 9850643 [patent_doc_number] => 08952377 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-10 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 13/527882 [patent_app_country] => US [patent_app_date] => 2012-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 66 [patent_no_of_words] => 36661 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13527882 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/527882
Semiconductor device and manufacturing method thereof Jun 19, 2012 Issued
Array ( [id] => 9195246 [patent_doc_number] => 20130334561 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-19 [patent_title] => 'METHOD FOR BONDING LED WAFER, METHOD FOR MANUFACTURING LED CHIP AND BONDING STRUCTURE' [patent_app_type] => utility [patent_app_number] => 13/527318 [patent_app_country] => US [patent_app_date] => 2012-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3760 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13527318 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/527318
METHOD FOR BONDING LED WAFER, METHOD FOR MANUFACTURING LED CHIP AND BONDING STRUCTURE Jun 18, 2012 Abandoned
Array ( [id] => 8563608 [patent_doc_number] => 20120326179 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-27 [patent_title] => 'DISPLAY DEVICE AND MANUFACTURING METHOD OF THE DISPLAY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/526568 [patent_app_country] => US [patent_app_date] => 2012-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5737 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13526568 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/526568
Display device and manufacturing method of the display device Jun 18, 2012 Issued
Array ( [id] => 9195377 [patent_doc_number] => 20130334692 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-19 [patent_title] => 'Bonding Package components Through Plating' [patent_app_type] => utility [patent_app_number] => 13/527422 [patent_app_country] => US [patent_app_date] => 2012-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 3479 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13527422 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/527422
Bonding package components through plating Jun 18, 2012 Issued
Array ( [id] => 11796863 [patent_doc_number] => 09406711 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-02 [patent_title] => 'Apparatus and method for backside illuminated image sensors' [patent_app_type] => utility [patent_app_number] => 13/524757 [patent_app_country] => US [patent_app_date] => 2012-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6015 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13524757 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/524757
Apparatus and method for backside illuminated image sensors Jun 14, 2012 Issued
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