
Matthew E. Warren
Examiner (ID: 9271, Phone: (571)272-1737 , Office: P/2815 )
| Most Active Art Unit | 2815 |
| Art Unit(s) | 2815, 2817 |
| Total Applications | 1856 |
| Issued Applications | 1508 |
| Pending Applications | 127 |
| Abandoned Applications | 248 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5628835
[patent_doc_number] => 20060145303
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-07-06
[patent_title] => 'Impurity doped UV protection layer'
[patent_app_type] => utility
[patent_app_number] => 11/039161
[patent_app_country] => US
[patent_app_date] => 2005-01-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4485
[patent_no_of_claims] => 57
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0145/20060145303.pdf
[firstpage_image] =>[orig_patent_app_number] => 11039161
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/039161 | Impurity doped UV protection layer | Jan 19, 2005 | Issued |
Array
(
[id] => 6929014
[patent_doc_number] => 20050280047
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-12-22
[patent_title] => 'FUSE OF A SEMICONDUCTOR MEMORY DEVICE AND REPAIR PROCESS FOR THE SAME'
[patent_app_type] => utility
[patent_app_number] => 10/905630
[patent_app_country] => US
[patent_app_date] => 2005-01-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[patent_no_of_words] => 2197
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[pdf_file] => publications/A1/0280/20050280047.pdf
[firstpage_image] =>[orig_patent_app_number] => 10905630
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/905630 | FUSE OF A SEMICONDUCTOR MEMORY DEVICE AND REPAIR PROCESS FOR THE SAME | Jan 12, 2005 | Abandoned |
Array
(
[id] => 865483
[patent_doc_number] => 07368773
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-05-06
[patent_title] => 'Photodetector device, solid-state imaging device, and camera system'
[patent_app_type] => utility
[patent_app_number] => 11/019512
[patent_app_country] => US
[patent_app_date] => 2004-12-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
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[patent_no_of_words] => 6514
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/368/07368773.pdf
[firstpage_image] =>[orig_patent_app_number] => 11019512
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/019512 | Photodetector device, solid-state imaging device, and camera system | Dec 22, 2004 | Issued |
Array
(
[id] => 5645901
[patent_doc_number] => 20060131633
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-06-22
[patent_title] => 'Integrated two device non-volatile memory'
[patent_app_type] => utility
[patent_app_number] => 11/018131
[patent_app_country] => US
[patent_app_date] => 2004-12-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 4812
[patent_no_of_claims] => 44
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[pdf_file] => publications/A1/0131/20060131633.pdf
[firstpage_image] =>[orig_patent_app_number] => 11018131
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/018131 | Integrated two device non-volatile memory | Dec 20, 2004 | Abandoned |
Array
(
[id] => 5908912
[patent_doc_number] => 20060124993
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-06-15
[patent_title] => 'SIDEWALL SEMICONDUCTOR TRANSISTORS'
[patent_app_type] => utility
[patent_app_number] => 10/905041
[patent_app_country] => US
[patent_app_date] => 2004-12-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[pdf_file] => publications/A1/0124/20060124993.pdf
[firstpage_image] =>[orig_patent_app_number] => 10905041
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/905041 | Sidewall semiconductor transistors | Dec 12, 2004 | Issued |
Array
(
[id] => 272917
[patent_doc_number] => RE040842
[patent_country] => US
[patent_kind] => E1
[patent_issue_date] => 2009-07-14
[patent_title] => 'Memory elements and methods for making same'
[patent_app_type] => reissue
[patent_app_number] => 11/008755
[patent_app_country] => US
[patent_app_date] => 2004-12-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
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[patent_no_of_words] => 10419
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/RE/040/RE040842.pdf
[firstpage_image] =>[orig_patent_app_number] => 11008755
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/008755 | Memory elements and methods for making same | Dec 8, 2004 | Issued |
Array
(
[id] => 915289
[patent_doc_number] => 07326969
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2008-02-05
[patent_title] => 'Semiconductor device incorporating thyristor-based memory and strained silicon'
[patent_app_type] => utility
[patent_app_number] => 11/004712
[patent_app_country] => US
[patent_app_date] => 2004-12-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 32
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[patent_no_of_words] => 15113
[patent_no_of_claims] => 19
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/326/07326969.pdf
[firstpage_image] =>[orig_patent_app_number] => 11004712
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/004712 | Semiconductor device incorporating thyristor-based memory and strained silicon | Dec 1, 2004 | Issued |
Array
(
[id] => 7228018
[patent_doc_number] => 20050269567
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-12-08
[patent_title] => 'TEST KEY FOR MONITORING GATE CONDUCTOR TO DEEP TRENCH MISALIGNMENT'
[patent_app_type] => utility
[patent_app_number] => 10/904652
[patent_app_country] => US
[patent_app_date] => 2004-11-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 1990
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0269/20050269567.pdf
[firstpage_image] =>[orig_patent_app_number] => 10904652
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/904652 | Test key for monitoring gate conductor to deep trench misalignment | Nov 20, 2004 | Issued |
Array
(
[id] => 5805213
[patent_doc_number] => 20060091566
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-05-04
[patent_title] => 'Bond pad structure for integrated circuit chip'
[patent_app_type] => utility
[patent_app_number] => 10/989481
[patent_app_country] => US
[patent_app_date] => 2004-11-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
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[patent_no_of_words] => 5667
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[pdf_file] => publications/A1/0091/20060091566.pdf
[firstpage_image] =>[orig_patent_app_number] => 10989481
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/989481 | Bond pad structure for integrated circuit chip | Nov 15, 2004 | Abandoned |
Array
(
[id] => 7053858
[patent_doc_number] => 20050275030
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-12-15
[patent_title] => 'Semiconductor device and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 10/989011
[patent_app_country] => US
[patent_app_date] => 2004-11-16
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0275/20050275030.pdf
[firstpage_image] =>[orig_patent_app_number] => 10989011
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/989011 | Semiconductor device and method of manufacturing the same | Nov 15, 2004 | Abandoned |
Array
(
[id] => 865570
[patent_doc_number] => 07368813
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-05-06
[patent_title] => 'Semiconductor device including semiconductor element surrounded by an insulating member and wiring structures on upper and lower surfaces of the semiconductor element and insulating member, and manufacturing method thereof'
[patent_app_type] => utility
[patent_app_number] => 10/986532
[patent_app_country] => US
[patent_app_date] => 2004-11-10
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[patent_drawing_sheets_cnt] => 27
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[pdf_file] => patents/07/368/07368813.pdf
[firstpage_image] =>[orig_patent_app_number] => 10986532
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/986532 | Semiconductor device including semiconductor element surrounded by an insulating member and wiring structures on upper and lower surfaces of the semiconductor element and insulating member, and manufacturing method thereof | Nov 9, 2004 | Issued |
Array
(
[id] => 7545806
[patent_doc_number] => 08053780
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[patent_kind] => B2
[patent_issue_date] => 2011-11-08
[patent_title] => 'Semiconductor element, method for manufacturing the same, liquid crystal display device, and method for manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 10/577057
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[pdf_file] => patents/08/053/08053780.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/577057 | Semiconductor element, method for manufacturing the same, liquid crystal display device, and method for manufacturing the same | Nov 4, 2004 | Issued |
Array
(
[id] => 6936598
[patent_doc_number] => 20050110159
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-05-26
[patent_title] => 'Stacked integrated circuit device including multiple substrates and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 10/977702
[patent_app_country] => US
[patent_app_date] => 2004-10-28
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[firstpage_image] =>[orig_patent_app_number] => 10977702
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/977702 | Stacked integrated circuit device including multiple substrates and method of manufacturing the same | Oct 27, 2004 | Abandoned |
Array
(
[id] => 6936587
[patent_doc_number] => 20050110148
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-05-26
[patent_title] => 'FUSE STUCTURE'
[patent_app_type] => utility
[patent_app_number] => 10/904081
[patent_app_country] => US
[patent_app_date] => 2004-10-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[firstpage_image] =>[orig_patent_app_number] => 10904081
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/904081 | Fuse-structure | Oct 21, 2004 | Issued |
Array
(
[id] => 7067062
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[patent_issue_date] => 2005-11-03
[patent_title] => 'Integrated circuit having a strengthened passivation structure'
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[firstpage_image] =>[orig_patent_app_number] => 10965623
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/965623 | Integrated circuit having a strengthened passivation structure | Oct 13, 2004 | Abandoned |
Array
(
[id] => 6917137
[patent_doc_number] => 20050094698
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-05-05
[patent_title] => 'Multi-chambered excimer or molecular fluorine gas discharge laser fluorine injection control'
[patent_app_type] => utility
[patent_app_number] => 10/953100
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[pdf_file] => publications/A1/0094/20050094698.pdf
[firstpage_image] =>[orig_patent_app_number] => 10953100
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/953100 | Multi-chambered excimer or molecular fluorine gas discharge laser fluorine injection control | Sep 28, 2004 | Issued |
Array
(
[id] => 84590
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[patent_issue_date] => 2010-06-22
[patent_title] => 'Semiconductor integrated circuit device'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/950611 | Semiconductor integrated circuit device | Sep 26, 2004 | Issued |
Array
(
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[patent_title] => 'Shallow source MOSFET'
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[firstpage_image] =>[orig_patent_app_number] => 10952231
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/952231 | Shallow source MOSFET | Sep 26, 2004 | Issued |
Array
(
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[patent_title] => 'Semiconductor device with etch resistant electrical insulation layer between gate electrode and source electrode'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/948692 | Semiconductor device with etch resistant electrical insulation layer between gate electrode and source electrode | Sep 23, 2004 | Issued |
Array
(
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[patent_title] => 'Monolithically integrated circuit comprising a thin film resistor, and fabrication method thereof'
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[patent_app_number] => 10/946932
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[pdf_file] => patents/07/119/07119415.pdf
[firstpage_image] =>[orig_patent_app_number] => 10946932
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/946932 | Monolithically integrated circuit comprising a thin film resistor, and fabrication method thereof | Sep 21, 2004 | Issued |