
Matthew E. Warren
Examiner (ID: 9293)
| Most Active Art Unit | 2815 |
| Art Unit(s) | 2817, 2815 |
| Total Applications | 1867 |
| Issued Applications | 1521 |
| Pending Applications | 123 |
| Abandoned Applications | 248 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19628731
[patent_doc_number] => 12167607
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-12-10
[patent_title] => Ferroelectric memory device and method of forming the same
[patent_app_type] => utility
[patent_app_number] => 17/874314
[patent_app_country] => US
[patent_app_date] => 2022-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 51
[patent_figures_cnt] => 51
[patent_no_of_words] => 11796
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17874314
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/874314 | Ferroelectric memory device and method of forming the same | Jul 26, 2022 | Issued |
Array
(
[id] => 20727267
[patent_doc_number] => 20260143995
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2026-05-21
[patent_title] => PROCESSING METHOD AND PROCESSING SYSTEM
[patent_app_type] => utility
[patent_app_number] => 18/683792
[patent_app_country] => US
[patent_app_date] => 2022-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6053
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -35
[patent_words_short_claim] => 180
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18683792
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/683792 | PROCESSING METHOD AND PROCESSING SYSTEM | Jul 26, 2022 | Pending |
Array
(
[id] => 19262574
[patent_doc_number] => 12022659
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-06-25
[patent_title] => Three-dimensional memory device and method
[patent_app_type] => utility
[patent_app_number] => 17/874844
[patent_app_country] => US
[patent_app_date] => 2022-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 49
[patent_figures_cnt] => 49
[patent_no_of_words] => 11395
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17874844
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/874844 | Three-dimensional memory device and method | Jul 26, 2022 | Issued |
Array
(
[id] => 17992947
[patent_doc_number] => 20220358984
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-11-10
[patent_title] => Memory Array Including Dummy Regions
[patent_app_type] => utility
[patent_app_number] => 17/815032
[patent_app_country] => US
[patent_app_date] => 2022-07-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13535
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17815032
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/815032 | Memory array including dummy regions | Jul 25, 2022 | Issued |
Array
(
[id] => 17993513
[patent_doc_number] => 20220359550
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-11-10
[patent_title] => System-on-Chip with Ferroelectric Random Access Memory and Tunable Capacitor
[patent_app_type] => utility
[patent_app_number] => 17/814610
[patent_app_country] => US
[patent_app_date] => 2022-07-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7824
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17814610
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/814610 | System-on-chip with ferroelectric random access memory and tunable capacitor | Jul 24, 2022 | Issued |
Array
(
[id] => 20649801
[patent_doc_number] => 12604765
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-04-14
[patent_title] => Integrated passive device dies and methods of forming and placement of the same
[patent_app_type] => utility
[patent_app_number] => 17/869906
[patent_app_country] => US
[patent_app_date] => 2022-07-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 21
[patent_no_of_words] => 7269
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17869906
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/869906 | Integrated passive device dies and methods of forming and placement of the same | Jul 20, 2022 | Issued |
Array
(
[id] => 17986171
[patent_doc_number] => 20220352208
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-11-03
[patent_title] => HIGH DENSITY 3D FERAM
[patent_app_type] => utility
[patent_app_number] => 17/868278
[patent_app_country] => US
[patent_app_date] => 2022-07-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8645
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17868278
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/868278 | High density 3D FERAM | Jul 18, 2022 | Issued |
Array
(
[id] => 17986295
[patent_doc_number] => 20220352332
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-11-03
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/864151
[patent_app_country] => US
[patent_app_date] => 2022-07-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13248
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -20
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17864151
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/864151 | Wide band gap semiconductor device with surface insulating film | Jul 12, 2022 | Issued |
Array
(
[id] => 18884881
[patent_doc_number] => 20240008250
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-01-04
[patent_title] => MEMORY DEVICE HAVING LATERALLY EXTENDING CAPACITORS OF DIFFERENT LENGTHS AND LEVELS
[patent_app_type] => utility
[patent_app_number] => 17/855949
[patent_app_country] => US
[patent_app_date] => 2022-07-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11445
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17855949
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/855949 | Memory device having laterally extending capacitors of different lengths and levels | Jun 30, 2022 | Issued |
Array
(
[id] => 17933651
[patent_doc_number] => 20220328777
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-10-13
[patent_title] => DISPLAY COMPONENT, DISPLAY DEVICE, AND METHOD FOR MANUFACTURING SAME
[patent_app_type] => utility
[patent_app_number] => 17/850147
[patent_app_country] => US
[patent_app_date] => 2022-06-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6301
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17850147
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/850147 | Display component and display device having a protective film defining an opening to facilitate bending thereof | Jun 26, 2022 | Issued |
Array
(
[id] => 17933594
[patent_doc_number] => 20220328720
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-10-13
[patent_title] => LIGHT-EMITTING DEVICE AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 17/848079
[patent_app_country] => US
[patent_app_date] => 2022-06-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6854
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17848079
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/848079 | Method of manufacturing a light-emitting device | Jun 22, 2022 | Issued |
Array
(
[id] => 19952777
[patent_doc_number] => 12324162
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2025-06-03
[patent_title] => Stacked capacitors with shared electrodes and methods of fabrication
[patent_app_type] => utility
[patent_app_number] => 17/807637
[patent_app_country] => US
[patent_app_date] => 2022-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 39
[patent_figures_cnt] => 78
[patent_no_of_words] => 38601
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 225
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17807637
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/807637 | Stacked capacitors with shared electrodes and methods of fabrication | Jun 16, 2022 | Issued |
Array
(
[id] => 19913661
[patent_doc_number] => 12289894
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2025-04-29
[patent_title] => Method of fabricating transistors and stacked planar capacitors for memory and logic applications
[patent_app_type] => utility
[patent_app_number] => 17/807655
[patent_app_country] => US
[patent_app_date] => 2022-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 39
[patent_figures_cnt] => 78
[patent_no_of_words] => 38626
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 208
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17807655
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/807655 | Method of fabricating transistors and stacked planar capacitors for memory and logic applications | Jun 16, 2022 | Issued |
Array
(
[id] => 17900470
[patent_doc_number] => 20220310132
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-09-29
[patent_title] => Memory Array Word Line Routing
[patent_app_type] => utility
[patent_app_number] => 17/842256
[patent_app_country] => US
[patent_app_date] => 2022-06-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13575
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 107
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17842256
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/842256 | Memory array word line routing | Jun 15, 2022 | Issued |
Array
(
[id] => 17886693
[patent_doc_number] => 20220302171
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-09-22
[patent_title] => SEMICONDUCTOR STRUCTURE WITH A LOGIC DEVICE AND A MEMORY DEVICE BEING FORMED IN DIFFERENT LEVELS, AND METHOD OF FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/837982
[patent_app_country] => US
[patent_app_date] => 2022-06-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6935
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 42
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17837982
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/837982 | Semiconductor structure with a logic device and a memory device being formed in different levels, and method of forming the same | Jun 9, 2022 | Issued |
Array
(
[id] => 18835336
[patent_doc_number] => 20230403863
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-12-14
[patent_title] => SEMICONDUCTOR DEVICES
[patent_app_type] => utility
[patent_app_number] => 17/835988
[patent_app_country] => US
[patent_app_date] => 2022-06-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5704
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 64
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17835988
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/835988 | Semiconductor devices having ferroelectric tunnel junction structure | Jun 8, 2022 | Issued |
Array
(
[id] => 18823092
[patent_doc_number] => 20230397433
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-12-07
[patent_title] => MEMORY DEVICE ASSEMBLY WITH A LEAKER DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/805586
[patent_app_country] => US
[patent_app_date] => 2022-06-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16638
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -22
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17805586
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/805586 | Memory device assembly with a leaker device | Jun 5, 2022 | Issued |
Array
(
[id] => 18823085
[patent_doc_number] => 20230397426
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-12-07
[patent_title] => MEMORY CELL, MEMORY ARRAY AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 17/832673
[patent_app_country] => US
[patent_app_date] => 2022-06-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10107
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 137
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17832673
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/832673 | Memory cell having source or drain electrode with kink portion, memory array and manufacturing method thereof | Jun 4, 2022 | Issued |
Array
(
[id] => 19200590
[patent_doc_number] => 11997854
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-05-28
[patent_title] => Semiconductor structure and method for manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 17/749190
[patent_app_country] => US
[patent_app_date] => 2022-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 21
[patent_no_of_words] => 6743
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17749190
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/749190 | Semiconductor structure and method for manufacturing the same | May 19, 2022 | Issued |
Array
(
[id] => 18723341
[patent_doc_number] => 11800719
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-10-24
[patent_title] => Nonvolatile memory device having a ferroelectric layer
[patent_app_type] => utility
[patent_app_number] => 17/749118
[patent_app_country] => US
[patent_app_date] => 2022-05-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 21
[patent_no_of_words] => 12199
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 256
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17749118
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/749118 | Nonvolatile memory device having a ferroelectric layer | May 18, 2022 | Issued |