Search

Matthew L. Reames

Examiner (ID: 9123, Phone: (571)272-2408 , Office: P/2893 )

Most Active Art Unit
2893
Art Unit(s)
2893, 2896, 2891
Total Applications
1527
Issued Applications
1103
Pending Applications
144
Abandoned Applications
309

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14955347 [patent_doc_number] => 10438953 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-10-08 [patent_title] => Integrated circuitry construction, a DRAM construction, and a method used in forming an integrated circuitry construction [patent_app_type] => utility [patent_app_number] => 16/043893 [patent_app_country] => US [patent_app_date] => 2018-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 5227 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16043893 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/043893
Integrated circuitry construction, a DRAM construction, and a method used in forming an integrated circuitry construction Jul 23, 2018 Issued
Array ( [id] => 15581165 [patent_doc_number] => 10580977 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-03 [patent_title] => Tightly integrated 1T1R ReRAM for planar technology [patent_app_type] => utility [patent_app_number] => 16/044077 [patent_app_country] => US [patent_app_date] => 2018-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5656 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16044077 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/044077
Tightly integrated 1T1R ReRAM for planar technology Jul 23, 2018 Issued
Array ( [id] => 18520166 [patent_doc_number] => 11710058 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-25 [patent_title] => Apparatus and method for recompilation of quantum circuits to compensate for drift in a quantum computer [patent_app_type] => utility [patent_app_number] => 16/024819 [patent_app_country] => US [patent_app_date] => 2018-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 5423 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16024819 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/024819
Apparatus and method for recompilation of quantum circuits to compensate for drift in a quantum computer Jun 29, 2018 Issued
Array ( [id] => 15871753 [patent_doc_number] => 20200143280 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-07 [patent_title] => QUANTUM SIMULATION OF REAL TIME EVOLUTION OF LATTICE HAMILTONIANS [patent_app_type] => utility [patent_app_number] => 16/020715 [patent_app_country] => US [patent_app_date] => 2018-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7012 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16020715 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/020715
Quantum simulation of real time evolution of lattice Hamiltonians Jun 26, 2018 Issued
Array ( [id] => 14191343 [patent_doc_number] => 20190115377 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-18 [patent_title] => IMAGING SENSOR [patent_app_type] => utility [patent_app_number] => 16/018207 [patent_app_country] => US [patent_app_date] => 2018-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4347 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16018207 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/018207
IMAGING SENSOR Jun 25, 2018 Abandoned
Array ( [id] => 15300393 [patent_doc_number] => 20190393332 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-26 [patent_title] => WORK FUNCTION BASED APPROACHES TO TRANSISTOR THRESHOLD VOLTAGE TUNING [patent_app_type] => utility [patent_app_number] => 16/016411 [patent_app_country] => US [patent_app_date] => 2018-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5552 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16016411 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/016411
Work function based approaches to transistor threshold voltage tuning Jun 21, 2018 Issued
Array ( [id] => 18827763 [patent_doc_number] => 11843054 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-12 [patent_title] => Vertical architecture of thin film transistors [patent_app_type] => utility [patent_app_number] => 16/016381 [patent_app_country] => US [patent_app_date] => 2018-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10999 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 307 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16016381 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/016381
Vertical architecture of thin film transistors Jun 21, 2018 Issued
Array ( [id] => 15299965 [patent_doc_number] => 20190393118 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-26 [patent_title] => SEMICONDUCTOR PACKAGE WITH SEALED THERMAL INTERFACE CAVITY WITH LOW THERMAL RESISTANCE LIQUID THERMAL INTERFACE MATERIAL [patent_app_type] => utility [patent_app_number] => 16/016399 [patent_app_country] => US [patent_app_date] => 2018-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5310 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16016399 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/016399
SEMICONDUCTOR PACKAGE WITH SEALED THERMAL INTERFACE CAVITY WITH LOW THERMAL RESISTANCE LIQUID THERMAL INTERFACE MATERIAL Jun 21, 2018 Abandoned
Array ( [id] => 17210768 [patent_doc_number] => 11171145 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-09 [patent_title] => Memory devices based on capacitors with built-in electric field [patent_app_type] => utility [patent_app_number] => 16/016375 [patent_app_country] => US [patent_app_date] => 2018-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 10882 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16016375 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/016375
Memory devices based on capacitors with built-in electric field Jun 21, 2018 Issued
Array ( [id] => 15300351 [patent_doc_number] => 20190393311 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-26 [patent_title] => TRANSISTOR WITH POLARIZATION LAYER SUPERLATTICE FOR TARGET THRESHOLD VOLTAGE TUNING [patent_app_type] => utility [patent_app_number] => 16/016406 [patent_app_country] => US [patent_app_date] => 2018-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6227 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16016406 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/016406
Transistor with polarization layer superlattice for target threshold voltage tuning Jun 21, 2018 Issued
Array ( [id] => 15300041 [patent_doc_number] => 20190393156 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-26 [patent_title] => METAL STRUCTURES, DEVICES, AND METHODS [patent_app_type] => utility [patent_app_number] => 16/015045 [patent_app_country] => US [patent_app_date] => 2018-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17722 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16015045 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/015045
Metal structures, devices, and methods Jun 20, 2018 Issued
Array ( [id] => 15299991 [patent_doc_number] => 20190393131 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-26 [patent_title] => THERMAL MANAGEMENT SOLUTIONS FOR STACKED INTEGRATED CIRCUIT DEVICES USING JUMPING DROPS VAPOR CHAMBERS [patent_app_type] => utility [patent_app_number] => 16/014312 [patent_app_country] => US [patent_app_date] => 2018-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10817 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16014312 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/014312
THERMAL MANAGEMENT SOLUTIONS FOR STACKED INTEGRATED CIRCUIT DEVICES USING JUMPING DROPS VAPOR CHAMBERS Jun 20, 2018 Abandoned
Array ( [id] => 15300115 [patent_doc_number] => 20190393193 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-26 [patent_title] => THERMAL MANAGEMENT SOLUTIONS FOR STACKED INTEGRATED CIRCUIT DEVICES USING JUMPING DROPS VAPOR CHAMBERS [patent_app_type] => utility [patent_app_number] => 16/014319 [patent_app_country] => US [patent_app_date] => 2018-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10817 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16014319 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/014319
Thermal management solutions for stacked integrated circuit devices using jumping drops vapor chambers Jun 20, 2018 Issued
Array ( [id] => 15300113 [patent_doc_number] => 20190393192 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-26 [patent_title] => THERMAL MANAGEMENT SOLUTIONS FOR STACKED INTEGRATED CIRCUIT DEVICES USING JUMPING DROPS VAPOR CHAMBERS [patent_app_type] => utility [patent_app_number] => 16/014313 [patent_app_country] => US [patent_app_date] => 2018-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10817 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16014313 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/014313
THERMAL MANAGEMENT SOLUTIONS FOR STACKED INTEGRATED CIRCUIT DEVICES USING JUMPING DROPS VAPOR CHAMBERS Jun 20, 2018 Abandoned
Array ( [id] => 13514401 [patent_doc_number] => 20180308743 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-25 [patent_title] => FABRICATION OF VERTICAL TRANSPORT FIN FIELD EFFECT TRANSISTORS WITH A SELF-ALIGNED SEPARATOR AND AN ISOLATION REGION WITH AN AIR GAP [patent_app_type] => utility [patent_app_number] => 16/013010 [patent_app_country] => US [patent_app_date] => 2018-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5808 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16013010 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/013010
Fabrication of vertical transport fin field effect transistors with a self-aligned separator and an isolation region with an air gap Jun 19, 2018 Issued
Array ( [id] => 18373295 [patent_doc_number] => 11653487 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-16 [patent_title] => 4F2 DRAM cell using vertical thin film transistor [patent_app_type] => utility [patent_app_number] => 16/013798 [patent_app_country] => US [patent_app_date] => 2018-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 6989 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16013798 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/013798
4F2 DRAM cell using vertical thin film transistor Jun 19, 2018 Issued
Array ( [id] => 15760531 [patent_doc_number] => 10622395 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-14 [patent_title] => Image sensing device [patent_app_type] => utility [patent_app_number] => 16/011672 [patent_app_country] => US [patent_app_date] => 2018-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 26 [patent_no_of_words] => 7896 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16011672 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/011672
Image sensing device Jun 18, 2018 Issued
Array ( [id] => 13786165 [patent_doc_number] => 20190006621 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-03 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/008155 [patent_app_country] => US [patent_app_date] => 2018-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2077 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16008155 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/008155
DISPLAY DEVICE Jun 13, 2018 Abandoned
Array ( [id] => 18190846 [patent_doc_number] => 11581451 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-14 [patent_title] => Method of facilitating straining of a semiconductor element for semiconductor fabrication, semiconductor platform obtained by the method, and optoelectronic device comprising the semiconductor platform [patent_app_type] => utility [patent_app_number] => 16/621601 [patent_app_country] => US [patent_app_date] => 2018-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 20 [patent_no_of_words] => 5502 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16621601 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/621601
Method of facilitating straining of a semiconductor element for semiconductor fabrication, semiconductor platform obtained by the method, and optoelectronic device comprising the semiconductor platform Jun 7, 2018 Issued
Array ( [id] => 13473971 [patent_doc_number] => 20180288528 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-04 [patent_title] => MICROPHONE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/001448 [patent_app_country] => US [patent_app_date] => 2018-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3886 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16001448 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/001448
Microphone and manufacturing method thereof Jun 5, 2018 Issued
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