Search

Matthew Laverne Whipple

Examiner (ID: 1192)

Most Active Art Unit
2813
Art Unit(s)
1109, 2813, 1763, 1104
Total Applications
304
Issued Applications
237
Pending Applications
21
Abandoned Applications
46

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3740885 [patent_doc_number] => 05786277 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-28 [patent_title] => 'Method of manufacturing a semiconductor device having an oxide film of a high quality on a semiconductor substrate' [patent_app_type] => 1 [patent_app_number] => 8/720376 [patent_app_country] => US [patent_app_date] => 1996-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 3390 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 21 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/786/05786277.pdf [firstpage_image] =>[orig_patent_app_number] => 720376 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/720376
Method of manufacturing a semiconductor device having an oxide film of a high quality on a semiconductor substrate Sep 26, 1996 Issued
08/721080 DEPOSITION OF DEVICE QUALITY, LOW HYDROGEN CONTENT, HYDROGENATED AMORPHOUS SILICON AT HIGH DEPOSITION RATES WITH INCREASED STABILITY USING THE HOT WIRE FILAMENT TECHNIQUE Sep 25, 1996 Abandoned
Array ( [id] => 4116976 [patent_doc_number] => 06071797 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-06 [patent_title] => 'Method for forming amorphous carbon thin film by plasma chemical vapor deposition' [patent_app_type] => 1 [patent_app_number] => 8/719958 [patent_app_country] => US [patent_app_date] => 1996-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4809 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/071/06071797.pdf [firstpage_image] =>[orig_patent_app_number] => 719958 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/719958
Method for forming amorphous carbon thin film by plasma chemical vapor deposition Sep 23, 1996 Issued
Array ( [id] => 3875427 [patent_doc_number] => 05747382 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-05 [patent_title] => 'Two-step planarization process using chemical-mechanical polishing and reactive-ion-etching' [patent_app_type] => 1 [patent_app_number] => 8/719232 [patent_app_country] => US [patent_app_date] => 1996-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2592 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/747/05747382.pdf [firstpage_image] =>[orig_patent_app_number] => 719232 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/719232
Two-step planarization process using chemical-mechanical polishing and reactive-ion-etching Sep 23, 1996 Issued
Array ( [id] => 3694996 [patent_doc_number] => 05661093 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-26 [patent_title] => 'Method for the stabilization of halogen-doped films through the use of multiple sealing layers' [patent_app_type] => 1 [patent_app_number] => 8/716490 [patent_app_country] => US [patent_app_date] => 1996-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 19 [patent_no_of_words] => 11525 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 29 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/661/05661093.pdf [firstpage_image] =>[orig_patent_app_number] => 716490 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/716490
Method for the stabilization of halogen-doped films through the use of multiple sealing layers Sep 11, 1996 Issued
Array ( [id] => 3950844 [patent_doc_number] => 05899746 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-04 [patent_title] => 'Method of forming pattern' [patent_app_type] => 1 [patent_app_number] => 8/697732 [patent_app_country] => US [patent_app_date] => 1996-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 13 [patent_no_of_words] => 1625 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/899/05899746.pdf [firstpage_image] =>[orig_patent_app_number] => 697732 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/697732
Method of forming pattern Aug 28, 1996 Issued
Array ( [id] => 3774345 [patent_doc_number] => 05817581 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-06 [patent_title] => 'Process for the creation of a thermal SiO.sub.2 layer with extremely uniform layer thickness' [patent_app_type] => 1 [patent_app_number] => 8/702608 [patent_app_country] => US [patent_app_date] => 1996-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1715 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/817/05817581.pdf [firstpage_image] =>[orig_patent_app_number] => 702608 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/702608
Process for the creation of a thermal SiO.sub.2 layer with extremely uniform layer thickness Aug 25, 1996 Issued
Array ( [id] => 3769193 [patent_doc_number] => 05849644 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-15 [patent_title] => 'Semiconductor processing methods of chemical vapor depositing SiO.sub.2 on a substrate' [patent_app_type] => 1 [patent_app_number] => 8/696243 [patent_app_country] => US [patent_app_date] => 1996-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2820 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/849/05849644.pdf [firstpage_image] =>[orig_patent_app_number] => 696243 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/696243
Semiconductor processing methods of chemical vapor depositing SiO.sub.2 on a substrate Aug 12, 1996 Issued
Array ( [id] => 3771833 [patent_doc_number] => 05807785 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-15 [patent_title] => 'Low dielectric constant silicon dioxide sandwich layer' [patent_app_type] => 1 [patent_app_number] => 8/691990 [patent_app_country] => US [patent_app_date] => 1996-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5357 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/807/05807785.pdf [firstpage_image] =>[orig_patent_app_number] => 691990 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/691990
Low dielectric constant silicon dioxide sandwich layer Aug 1, 1996 Issued
Array ( [id] => 1336616 [patent_doc_number] => 06593245 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-15 [patent_title] => 'Silicon nitride etch process with critical dimension gain' [patent_app_type] => B1 [patent_app_number] => 08/690848 [patent_app_country] => US [patent_app_date] => 1996-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 1812 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/593/06593245.pdf [firstpage_image] =>[orig_patent_app_number] => 08690848 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/690848
Silicon nitride etch process with critical dimension gain Jul 31, 1996 Issued
Array ( [id] => 3660794 [patent_doc_number] => 05656556 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-12 [patent_title] => 'Method for fabricating planarized borophosphosilicate glass films having low anneal temperatures' [patent_app_type] => 1 [patent_app_number] => 8/684663 [patent_app_country] => US [patent_app_date] => 1996-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 3513 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/656/05656556.pdf [firstpage_image] =>[orig_patent_app_number] => 684663 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/684663
Method for fabricating planarized borophosphosilicate glass films having low anneal temperatures Jul 21, 1996 Issued
08/677218 IN-SITU CONSTRUCTION OF AN OXIDIZED FILM ON A SEMICONDUCTOR WAFFER Jul 8, 1996 Abandoned
08/673279 SOLID POROUS INSULATED CONDUCTIVE LINES Jun 27, 1996 Abandoned
Array ( [id] => 3682013 [patent_doc_number] => 05633202 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-27 [patent_title] => 'High tensile nitride layer' [patent_app_type] => 1 [patent_app_number] => 8/660734 [patent_app_country] => US [patent_app_date] => 1996-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 15 [patent_no_of_words] => 6012 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/633/05633202.pdf [firstpage_image] =>[orig_patent_app_number] => 660734 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/660734
High tensile nitride layer Jun 5, 1996 Issued
Array ( [id] => 3832444 [patent_doc_number] => 05814555 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-29 [patent_title] => 'Interlevel dielectric with air gaps to lessen capacitive coupling' [patent_app_type] => 1 [patent_app_number] => 8/658456 [patent_app_country] => US [patent_app_date] => 1996-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 3988 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/814/05814555.pdf [firstpage_image] =>[orig_patent_app_number] => 658456 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/658456
Interlevel dielectric with air gaps to lessen capacitive coupling Jun 4, 1996 Issued
08/655409 METHOD FOR PRODUCING SEMICONDUCTOR DEVICE May 29, 1996 Abandoned
Array ( [id] => 3812632 [patent_doc_number] => 05710079 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-20 [patent_title] => 'Method and apparatus for forming dielectric films' [patent_app_type] => 1 [patent_app_number] => 8/653264 [patent_app_country] => US [patent_app_date] => 1996-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4420 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/710/05710079.pdf [firstpage_image] =>[orig_patent_app_number] => 653264 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/653264
Method and apparatus for forming dielectric films May 23, 1996 Issued
Array ( [id] => 3722753 [patent_doc_number] => 05672525 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-30 [patent_title] => 'Polysilicon gate reoxidation in a gas mixture of oxygen and nitrogen trifluoride gas by rapid thermal processing to improve hot carrier immunity' [patent_app_type] => 1 [patent_app_number] => 8/652882 [patent_app_country] => US [patent_app_date] => 1996-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 14 [patent_no_of_words] => 3603 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/672/05672525.pdf [firstpage_image] =>[orig_patent_app_number] => 652882 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/652882
Polysilicon gate reoxidation in a gas mixture of oxygen and nitrogen trifluoride gas by rapid thermal processing to improve hot carrier immunity May 22, 1996 Issued
08/646719 SEMICONDUCTOR PROCESSING METHOD OF REDUCING THICKNESS DEPLETION OF A NITRIDE LAYER AT A JUNCTION OF DIFFERENT UNDERLYING LAYERS May 8, 1996 Abandoned
08/583130 METHOD FOR MANUFACTURING SEMICONDUCTOR Apr 23, 1996 Abandoned
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