| Application number | Title of the application | Filing Date | Status |
|---|
Array
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[patent_doc_number] => 05522059
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[patent_kind] => NA
[patent_issue_date] => 1996-05-28
[patent_title] => 'Apparatus for multiport memory access control unit with plurality of bank busy state check mechanisms employing address decoding and coincidence detection schemes'
[patent_app_type] => 1
[patent_app_number] => 8/156899
[patent_app_country] => US
[patent_app_date] => 1993-11-24
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[firstpage_image] =>[orig_patent_app_number] => 156899
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/156899 | Apparatus for multiport memory access control unit with plurality of bank busy state check mechanisms employing address decoding and coincidence detection schemes | Nov 23, 1993 | Issued |
| 08/152245 | HIGH-PERFORMANCE NON-VOLATILE RAM PROTECTED WRITE CACHE ACCELERATOR SYSTEM | Nov 11, 1993 | Abandoned |
Array
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[patent_doc_number] => 05564032
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-10-08
[patent_title] => 'Control apparatus for controlling memory unit capable of selecting an electrically erasable non-volatile memory and loading information stored therein'
[patent_app_type] => 1
[patent_app_number] => 8/149113
[patent_app_country] => US
[patent_app_date] => 1993-11-09
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[firstpage_image] =>[orig_patent_app_number] => 149113
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/149113 | Control apparatus for controlling memory unit capable of selecting an electrically erasable non-volatile memory and loading information stored therein | Nov 8, 1993 | Issued |
Array
(
[id] => 3604559
[patent_doc_number] => 05568629
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-10-22
[patent_title] => 'Method for partitioning disk drives within a physical disk array and selectively assigning disk drive partitions into a logical disk array'
[patent_app_type] => 1
[patent_app_number] => 8/148031
[patent_app_country] => US
[patent_app_date] => 1993-11-04
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[firstpage_image] =>[orig_patent_app_number] => 148031
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/148031 | Method for partitioning disk drives within a physical disk array and selectively assigning disk drive partitions into a logical disk array | Nov 3, 1993 | Issued |
Array
(
[id] => 3564219
[patent_doc_number] => 05572692
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-11-05
[patent_title] => 'Memory configuration decoding system having automatic row base address generation mechanism for variable memory devices with row access interleaving'
[patent_app_type] => 1
[patent_app_number] => 8/143984
[patent_app_country] => US
[patent_app_date] => 1993-10-27
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[firstpage_image] =>[orig_patent_app_number] => 143984
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Array
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[id] => 3552647
[patent_doc_number] => 05481691
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-01-02
[patent_title] => 'Cache page replacement using sequential LIFO and non-sequential LRU cast out'
[patent_app_type] => 1
[patent_app_number] => 8/141004
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[patent_app_date] => 1993-10-26
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/141004 | Cache page replacement using sequential LIFO and non-sequential LRU cast out | Oct 25, 1993 | Issued |
Array
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[patent_kind] => NA
[patent_issue_date] => 1996-05-28
[patent_title] => 'Hybrid write back/write through cache having a streamlined four state cache coherency protocol for uniprocessor computer systems'
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[firstpage_image] =>[orig_patent_app_number] => 142199
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/142199 | Hybrid write back/write through cache having a streamlined four state cache coherency protocol for uniprocessor computer systems | Oct 24, 1993 | Issued |
Array
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[id] => 3070477
[patent_doc_number] => 05339411
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-08-16
[patent_title] => 'Method for managing allocation of memory space'
[patent_app_type] => 1
[patent_app_number] => 8/142541
[patent_app_country] => US
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[pdf_file] => patents/05/339/05339411.pdf
[firstpage_image] =>[orig_patent_app_number] => 142541
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/142541 | Method for managing allocation of memory space | Oct 21, 1993 | Issued |
Array
(
[id] => 3626378
[patent_doc_number] => 05535365
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-07-09
[patent_title] => 'Method and apparatus for locking shared memory locations in multiprocessing systems'
[patent_app_type] => 1
[patent_app_number] => 8/141259
[patent_app_country] => US
[patent_app_date] => 1993-10-22
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[firstpage_image] =>[orig_patent_app_number] => 141259
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/141259 | Method and apparatus for locking shared memory locations in multiprocessing systems | Oct 21, 1993 | Issued |
Array
(
[id] => 3495021
[patent_doc_number] => 05446854
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-08-29
[patent_title] => 'Virtual memory computer apparatus and address translation mechanism employing hashing scheme and page frame descriptor that support multiple page sizes'
[patent_app_type] => 1
[patent_app_number] => 8/139549
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[firstpage_image] =>[orig_patent_app_number] => 139549
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/139549 | Virtual memory computer apparatus and address translation mechanism employing hashing scheme and page frame descriptor that support multiple page sizes | Oct 19, 1993 | Issued |
| 08/136799 | DATA PROCESSOR WITH OPERATION UNITS EXECUTING DYADIC AND MONADIC OPERATIONS SHARING GROUPS OF REGISTER FILES WITH ONE OF THE UNITS EXCLUSIVELY ACCESSING ONE OF THGE REGISTER FILES | Oct 13, 1993 | Abandoned |
Array
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[id] => 3424269
[patent_doc_number] => 05412787
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[patent_kind] => NA
[patent_issue_date] => 1995-05-02
[patent_title] => 'Two-level TLB having the second level TLB implemented in cache tag RAMs'
[patent_app_type] => 1
[patent_app_number] => 8/136715
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[firstpage_image] =>[orig_patent_app_number] => 136715
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/136715 | Two-level TLB having the second level TLB implemented in cache tag RAMs | Oct 12, 1993 | Issued |
Array
(
[id] => 3009402
[patent_doc_number] => 05363484
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-11-08
[patent_title] => 'Multiple computer system with combiner/memory interconnection system employing separate direct access link for transferring information packets'
[patent_app_type] => 1
[patent_app_number] => 8/129880
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Array
(
[id] => 3432584
[patent_doc_number] => 05479642
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[patent_issue_date] => 1995-12-26
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[patent_app_type] => 1
[patent_app_number] => 8/128919
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/128919 | Method for maintaining low-overhead and non-coherent cache refresh mechanism with valid status monitoring on time period basis | Sep 29, 1993 | Issued |
| 08/129016 | SEMICONDUCTOR MEMORY DEVICE UTILIZING DATA COMPRESSION AND EXPANSION CIRCUIT | Sep 27, 1993 | Abandoned |
Array
(
[id] => 3526990
[patent_doc_number] => 05513374
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[patent_kind] => NA
[patent_issue_date] => 1996-04-30
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[patent_app_type] => 1
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/127685 | On-chip interface and DMA controller with interrupt functions for digital signal processor | Sep 26, 1993 | Issued |
Array
(
[id] => 3627262
[patent_doc_number] => 05535417
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-07-09
[patent_title] => 'On-chip DMA controller with host computer interface employing boot sequencing and address generation schemes'
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Array
(
[id] => 3605840
[patent_doc_number] => 05522054
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-05-28
[patent_title] => 'Dynamic control of outstanding hard disk read requests for sequential and random operations'
[patent_app_type] => 1
[patent_app_number] => 8/120679
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[patent_app_date] => 1993-09-13
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/120679 | Dynamic control of outstanding hard disk read requests for sequential and random operations | Sep 12, 1993 | Issued |
| 08/116810 | DATA STORAGE SYSTEM CONNECTED TO HOST COMPUTER SYSTEM AND HAVING REMOVABLE DATA STORAGE MEDIA AND EQUIPPED TO READ A CONTROL PROGRAM FROM THE REMOVABLE MEDIA INTO STORAGE EMPLOYING ID COMPARAISON SCHEME | Sep 6, 1993 | Abandoned |
Array
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[patent_issue_date] => 1997-02-18
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[patent_app_type] => 1
[patent_app_number] => 8/113554
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/113554 | System and method for empty notification from peer cache units to global storage control unit in a multiprocessor data processing system | Aug 26, 1993 | Issued |