| Application number | Title of the application | Filing Date | Status |
|---|
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[patent_issue_date] => 1998-03-24
[patent_title] => 'Consistently specifying way destinations through prefetching hints'
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[patent_issue_date] => 1996-07-09
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[patent_app_number] => 8/393569
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Array
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[patent_kind] => NA
[patent_issue_date] => 1996-10-01
[patent_title] => 'Port swapping for improved virtual SRAM performance and processing of concurrent processor access requests'
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[patent_app_number] => 8/376275
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Array
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[patent_kind] => NA
[patent_issue_date] => 1997-07-01
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/376944 | System and method for handling I/O requests over an interface bus to a storage disk array | Jan 18, 1995 | Issued |
| 08/372526 | METHOD AND APPARATUS FOR PERFORMING ATOMIC TRANSACTIONS IN A SHARED MEMORY MULTIPROCESSOR SYSTEM | Jan 12, 1995 | Abandoned |
Array
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Array
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[patent_issue_date] => 1997-03-11
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Array
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[patent_doc_number] => 05636357
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[patent_kind] => NA
[patent_issue_date] => 1997-06-03
[patent_title] => 'Memory card and method for operation in a plurality of systems having incompatible object code format requirements'
[patent_app_type] => 1
[patent_app_number] => 8/361056
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Array
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[patent_issue_date] => 1995-08-29
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Array
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Array
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| 08/351759 | EXTERNAL MEANS OF CONTROLLING CACHEABILITY ATTRIBUTE OF CPU ACCESSES | Dec 7, 1994 | Abandoned |
| 08/349226 | SHARED L2 SUPPORT FOR INCLUSION PROPERTY IN SPLIT L1 DATA AND INSTRUCTION CACHES | Dec 4, 1994 | Abandoned |
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Array
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