| Application number | Title of the application | Filing Date | Status |
|---|
Array
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[patent_kind] => NA
[patent_issue_date] => 1997-05-06
[patent_title] => 'Data compression and decompression using memory spaces of more than one size'
[patent_app_type] => 1
[patent_app_number] => 8/251465
[patent_app_country] => US
[patent_app_date] => 1994-06-01
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/251465 | Data compression and decompression using memory spaces of more than one size | May 31, 1994 | Issued |
| 08/252546 | DISC SELECTING AND CONTROLLING METHOD | May 31, 1994 | Abandoned |
| 08/247139 | SET ASSOCIATIVE BLOCK MANAGEMENT DISK CACHE | May 19, 1994 | Abandoned |
Array
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[patent_doc_number] => 05561779
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-10-01
[patent_title] => 'Processor board having a second level writeback cache system and a third level writethrough cache system which stores exclusive state information for use in a multiprocessor computer system'
[patent_app_type] => 1
[patent_app_number] => 8/237779
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[firstpage_image] =>[orig_patent_app_number] => 237779
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/237779 | Processor board having a second level writeback cache system and a third level writethrough cache system which stores exclusive state information for use in a multiprocessor computer system | May 3, 1994 | Issued |
| 08/235079 | OPERATOR-COMMUNICATIONS INTERFACE FOR A MANUAL DATA STORAGE LIBRARY | Apr 28, 1994 | Abandoned |
Array
(
[id] => 3585548
[patent_doc_number] => 05539891
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-07-23
[patent_title] => 'Data transfer control circuit with a sequencer circuit and control subcircuits and data control method for successively entering data into a memory'
[patent_app_type] => 1
[patent_app_number] => 8/234508
[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 234508
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/234508 | Data transfer control circuit with a sequencer circuit and control subcircuits and data control method for successively entering data into a memory | Apr 27, 1994 | Issued |
| 08/231479 | SYSTEM FOR MANAGEMENT OF LIMITING AMOUNT OF USE OF SOFTWARE AND LIMITING NUMBER OF BACKUP COPIES EMPLOYING MEMORY PROCESSING UNIT REGULATION INFORMATION | Apr 21, 1994 | Abandoned |
Array
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[id] => 3604630
[patent_doc_number] => 05568634
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-10-22
[patent_title] => 'Method of writing in a non-volatile memory, notably in a memory card employing memory allocation strategies on size and occupancy basis'
[patent_app_type] => 1
[patent_app_number] => 8/231019
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[firstpage_image] =>[orig_patent_app_number] => 231019
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/231019 | Method of writing in a non-volatile memory, notably in a memory card employing memory allocation strategies on size and occupancy basis | Apr 20, 1994 | Issued |
Array
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[id] => 3564332
[patent_doc_number] => 05572698
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-11-05
[patent_title] => 'System and method for allocating memory resources where the category of a memory resource determines where on a circular stack a pointer to the memory resource is placed'
[patent_app_type] => 1
[patent_app_number] => 8/228989
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/228989 | System and method for allocating memory resources where the category of a memory resource determines where on a circular stack a pointer to the memory resource is placed | Apr 17, 1994 | Issued |
Array
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[patent_issue_date] => 1994-12-27
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/227188 | Methods and apparatus for providing multiple pending operations in a cache consistent multiple processor computer system | Apr 12, 1994 | Issued |
Array
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[id] => 3563213
[patent_doc_number] => 05548795
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-08-20
[patent_title] => 'Method for determining command execution dependencies within command queue reordering process'
[patent_app_type] => 1
[patent_app_number] => 8/218567
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[patent_app_date] => 1994-03-28
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[firstpage_image] =>[orig_patent_app_number] => 218567
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/218567 | Method for determining command execution dependencies within command queue reordering process | Mar 27, 1994 | Issued |
| 08/215217 | DISK ACCELERATOR | Mar 20, 1994 | Abandoned |
| 08/208987 | METHOD AND APPARATUS FOR PERFORMING PIPELINE STORE INSTRUCTIONS USING A SINGLE CACHE ACCESS PIPESTAGE | Mar 8, 1994 | Abandoned |
Array
(
[id] => 4422555
[patent_doc_number] => 06272610
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-08-07
[patent_title] => 'File memory device using flash memories, and an information processing system using the same'
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Array
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[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-02-21
[patent_title] => 'Processor cycle tracking in a controller for two-way set associative cache'
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[patent_app_number] => 8/205129
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/205129 | Processor cycle tracking in a controller for two-way set associative cache | Feb 28, 1994 | Issued |
Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/204107 | Method and system for automated data storage system space allocation utilizing prioritized data set parameters | Feb 28, 1994 | Issued |
Array
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Array
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/200217 | Control apparatus for controlling data read accesses to memory and subsequent address generation scheme based on data/memory width determination and address validation | Feb 22, 1994 | Issued |