Search

Matthew O Savage

Examiner (ID: 1392, Phone: (571)272-1146 , Office: P/1773 )

Most Active Art Unit
1306
Art Unit(s)
1778, 1724, 1306, 1723, 1797, 1773, 1776
Total Applications
2718
Issued Applications
1844
Pending Applications
157
Abandoned Applications
717

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3487980 [patent_doc_number] => 05457564 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-10-10 [patent_title] => 'Complementary surface confined polymer electrochromic materials, systems, and methods of fabrication therefor' [patent_app_type] => 1 [patent_app_number] => 8/042829 [patent_app_country] => US [patent_app_date] => 1993-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 31 [patent_no_of_words] => 11076 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/457/05457564.pdf [firstpage_image] =>[orig_patent_app_number] => 042829 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/042829
Complementary surface confined polymer electrochromic materials, systems, and methods of fabrication therefor Apr 4, 1993 Issued
Array ( [id] => 3080115 [patent_doc_number] => 05361234 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-11-01 [patent_title] => 'Semiconductor memory cell device having dummy capacitors reducing boundary level changes between a memory cell array area and a peripheral circuit area' [patent_app_type] => 1 [patent_app_number] => 8/037375 [patent_app_country] => US [patent_app_date] => 1993-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 6624 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/361/05361234.pdf [firstpage_image] =>[orig_patent_app_number] => 037375 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/037375
Semiconductor memory cell device having dummy capacitors reducing boundary level changes between a memory cell array area and a peripheral circuit area Mar 25, 1993 Issued
08/032247 FLASH MEMORY AND METHOD OF PRODUCING THE SAME Mar 16, 1993 Pending
08/031877 DATA LINE DISTURBANCE FREE MEMORY BLOCK DIVIDED FLASH MEMORY AND MICROCOMPUTER HAVING FLASH MEMORY THEREIN Mar 15, 1993 Pending
Array ( [id] => 3066448 [patent_doc_number] => 05357472 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-10-18 [patent_title] => 'Non-volatile semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/031788 [patent_app_country] => US [patent_app_date] => 1993-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2814 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/357/05357472.pdf [firstpage_image] =>[orig_patent_app_number] => 031788 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/031788
Non-volatile semiconductor memory device Mar 14, 1993 Issued
Array ( [id] => 3622824 [patent_doc_number] => 05566129 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-15 [patent_title] => 'Semiconductor memory device with address transition detector' [patent_app_type] => 1 [patent_app_number] => 8/024272 [patent_app_country] => US [patent_app_date] => 1993-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 20 [patent_no_of_words] => 10005 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/566/05566129.pdf [firstpage_image] =>[orig_patent_app_number] => 024272 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/024272
Semiconductor memory device with address transition detector Feb 25, 1993 Issued
Array ( [id] => 3032274 [patent_doc_number] => 05327385 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-07-05 [patent_title] => 'Method of erasure for a non-volatile semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/019899 [patent_app_country] => US [patent_app_date] => 1993-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 6083 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/327/05327385.pdf [firstpage_image] =>[orig_patent_app_number] => 019899 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/019899
Method of erasure for a non-volatile semiconductor memory device Feb 18, 1993 Issued
Array ( [id] => 3001320 [patent_doc_number] => 05347488 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-09-13 [patent_title] => 'Semiconductor memory device for generating a controlling signal to select a word line' [patent_app_type] => 1 [patent_app_number] => 8/019698 [patent_app_country] => US [patent_app_date] => 1993-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3768 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/347/05347488.pdf [firstpage_image] =>[orig_patent_app_number] => 019698 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/019698
Semiconductor memory device for generating a controlling signal to select a word line Feb 18, 1993 Issued
Array ( [id] => 3671536 [patent_doc_number] => 05657275 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-12 [patent_title] => 'Semiconductor memory device including sense amplifier for high-speed write operation' [patent_app_type] => 1 [patent_app_number] => 8/019557 [patent_app_country] => US [patent_app_date] => 1993-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 5148 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/657/05657275.pdf [firstpage_image] =>[orig_patent_app_number] => 019557 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/019557
Semiconductor memory device including sense amplifier for high-speed write operation Feb 18, 1993 Issued
Array ( [id] => 3418034 [patent_doc_number] => 05438537 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-08-01 [patent_title] => 'Static random access memory which has a pair of thin film transistors and wherein the capacitance and resistance between the gate electrodes and the conductor layers are increased so as to reduce the time constant between them' [patent_app_type] => 1 [patent_app_number] => 8/019439 [patent_app_country] => US [patent_app_date] => 1993-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 2626 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/438/05438537.pdf [firstpage_image] =>[orig_patent_app_number] => 019439 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/019439
Static random access memory which has a pair of thin film transistors and wherein the capacitance and resistance between the gate electrodes and the conductor layers are increased so as to reduce the time constant between them Feb 17, 1993 Issued
08/017728 POWER SAVING SYSTEM FOR A MEMORY CONTROLLER Feb 15, 1993 Abandoned
Array ( [id] => 3124806 [patent_doc_number] => 05396459 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-03-07 [patent_title] => 'Single transistor flash electrically programmable memory cell in which a negative voltage is applied to the nonselected word line' [patent_app_type] => 1 [patent_app_number] => 8/018311 [patent_app_country] => US [patent_app_date] => 1993-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 23 [patent_no_of_words] => 8764 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/396/05396459.pdf [firstpage_image] =>[orig_patent_app_number] => 018311 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/018311
Single transistor flash electrically programmable memory cell in which a negative voltage is applied to the nonselected word line Feb 15, 1993 Issued
08/015008 SEMICONDUCTOR MEMORY DEVICE WITH A SELF-INITIALIZING CIRCUIT OPERABLE AFTER SUPPLY OF POWER Feb 8, 1993 Abandoned
Array ( [id] => 3006595 [patent_doc_number] => 05363331 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-11-08 [patent_title] => 'Semiconductor memory with column line control circuits for protection against broken column lines' [patent_app_type] => 1 [patent_app_number] => 7/994674 [patent_app_country] => US [patent_app_date] => 1992-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3215 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/363/05363331.pdf [firstpage_image] =>[orig_patent_app_number] => 994674 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/994674
Semiconductor memory with column line control circuits for protection against broken column lines Dec 21, 1992 Issued
Array ( [id] => 3060627 [patent_doc_number] => 05283764 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-02-01 [patent_title] => 'Refresh timer for providing a constant refresh timer regardless of variations in the operating voltage' [patent_app_type] => 1 [patent_app_number] => 7/990914 [patent_app_country] => US [patent_app_date] => 1992-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 6678 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/283/05283764.pdf [firstpage_image] =>[orig_patent_app_number] => 990914 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/990914
Refresh timer for providing a constant refresh timer regardless of variations in the operating voltage Dec 14, 1992 Issued
Array ( [id] => 3049380 [patent_doc_number] => 05377139 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-12-27 [patent_title] => 'Process forming an integrated circuit' [patent_app_type] => 1 [patent_app_number] => 7/990341 [patent_app_country] => US [patent_app_date] => 1992-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 6436 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/377/05377139.pdf [firstpage_image] =>[orig_patent_app_number] => 990341 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/990341
Process forming an integrated circuit Dec 10, 1992 Issued
Array ( [id] => 3428038 [patent_doc_number] => 05434821 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-07-18 [patent_title] => 'Dynamic semiconductor memory device having sense amplifier with compensated offset voltage' [patent_app_type] => 1 [patent_app_number] => 7/986908 [patent_app_country] => US [patent_app_date] => 1992-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 31 [patent_no_of_words] => 3962 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/434/05434821.pdf [firstpage_image] =>[orig_patent_app_number] => 986908 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/986908
Dynamic semiconductor memory device having sense amplifier with compensated offset voltage Dec 7, 1992 Issued
Array ( [id] => 3004102 [patent_doc_number] => 05367481 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-11-22 [patent_title] => 'Dynamic random access memory with complementary bit lines and capacitor common line' [patent_app_type] => 1 [patent_app_number] => 7/985114 [patent_app_country] => US [patent_app_date] => 1992-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4292 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 24 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/367/05367481.pdf [firstpage_image] =>[orig_patent_app_number] => 985114 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/985114
Dynamic random access memory with complementary bit lines and capacitor common line Dec 2, 1992 Issued
Array ( [id] => 3064215 [patent_doc_number] => 05345411 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-09-06 [patent_title] => 'Content addressable memory for high speed retrieval operation without interference between memory cells' [patent_app_type] => 1 [patent_app_number] => 7/982901 [patent_app_country] => US [patent_app_date] => 1992-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4425 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 408 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/345/05345411.pdf [firstpage_image] =>[orig_patent_app_number] => 982901 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/982901
Content addressable memory for high speed retrieval operation without interference between memory cells Nov 29, 1992 Issued
Array ( [id] => 3004138 [patent_doc_number] => 05367483 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-11-22 [patent_title] => 'Electrically erasable and programmable read-only memory cells with a single polysilicon level and method for producing the same' [patent_app_type] => 1 [patent_app_number] => 7/983799 [patent_app_country] => US [patent_app_date] => 1992-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 9 [patent_no_of_words] => 2374 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/367/05367483.pdf [firstpage_image] =>[orig_patent_app_number] => 983799 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/983799
Electrically erasable and programmable read-only memory cells with a single polysilicon level and method for producing the same Nov 23, 1992 Issued
Menu