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Matthew O Savage

Examiner (ID: 1392, Phone: (571)272-1146 , Office: P/1773 )

Most Active Art Unit
1306
Art Unit(s)
1778, 1724, 1306, 1723, 1797, 1773, 1776
Total Applications
2718
Issued Applications
1844
Pending Applications
157
Abandoned Applications
717
Applications
StatisticsSubscription-Only

Applications

Application numberTitle of the applicationFiling DateStatus
07/884091 SEMICONDUCTOR MEMORY DEVICE HAVING REDUNDANT MEMORY CELLS May 14, 1992 Abandoned
Array ( [id] => 3105460 [patent_doc_number] => 05291455 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-03-01 [patent_title] => 'Memory having distributed reference and bias voltages' [patent_app_type] => 1 [patent_app_number] => 7/880381 [patent_app_country] => US [patent_app_date] => 1992-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6541 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/291/05291455.pdf [firstpage_image] =>[orig_patent_app_number] => 880381 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/880381 		Memory having distributed reference and bias voltages May 7, 1992 Issued
Array ( [id] => 3090347 [patent_doc_number] => 05321647 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-06-14 [patent_title] => 'Semiconductor memory device and operational method with reduced well noise' [patent_app_type] => 1 [patent_app_number] => 7/879822 [patent_app_country] => US [patent_app_date] => 1992-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3084 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/321/05321647.pdf [firstpage_image] =>[orig_patent_app_number] => 879822 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/879822 		Semiconductor memory device and operational method with reduced well noise May 6, 1992 Issued
Array ( [id] => 3047014 [patent_doc_number] => 05301141 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-04-05 [patent_title] => 'Data flow computer with an articulated first-in-first-out content addressable memory' [patent_app_type] => 1 [patent_app_number] => 7/877471 [patent_app_country] => US [patent_app_date] => 1992-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7951 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 275 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/301/05301141.pdf [firstpage_image] =>[orig_patent_app_number] => 877471 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/877471 		Data flow computer with an articulated first-in-first-out content addressable memory Apr 30, 1992 Issued
Array ( [id] => 3025397 [patent_doc_number] => 05341327 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-08-23 [patent_title] => 'Static random access type semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 7/859566 [patent_app_country] => US [patent_app_date] => 1992-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 50 [patent_no_of_words] => 6649 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/341/05341327.pdf [firstpage_image] =>[orig_patent_app_number] => 859566 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/859566 		Static random access type semiconductor memory device Mar 26, 1992 Issued
Array ( [id] => 3084364 [patent_doc_number] => 05365487 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-11-15 [patent_title] => 'DRAM power management with self-refresh' [patent_app_type] => 1 [patent_app_number] => 7/857034 [patent_app_country] => US [patent_app_date] => 1992-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 3690 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/365/05365487.pdf [firstpage_image] =>[orig_patent_app_number] => 857034 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/857034 		DRAM power management with self-refresh Mar 23, 1992 Issued
Array ( [id] => 3066428 [patent_doc_number] => 05357471 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-10-18 [patent_title] => 'Fault locator architecture and method for memories' [patent_app_type] => 1 [patent_app_number] => 7/856004 [patent_app_country] => US [patent_app_date] => 1992-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 12555 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/357/05357471.pdf [firstpage_image] =>[orig_patent_app_number] => 856004 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/856004 		Fault locator architecture and method for memories Mar 19, 1992 Issued
Array ( [id] => 3076539 [patent_doc_number] => 05311469 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-05-10 [patent_title] => 'Semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 7/845654 [patent_app_country] => US [patent_app_date] => 1992-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 2158 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/311/05311469.pdf [firstpage_image] =>[orig_patent_app_number] => 845654 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/845654 		Semiconductor memory device Mar 3, 1992 Issued
Array ( [id] => 3047358 [patent_doc_number] => 05301160 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-04-05 [patent_title] => 'Computer including an integrated circuit having a low power selection control arrangement' [patent_app_type] => 1 [patent_app_number] => 7/840418 [patent_app_country] => US [patent_app_date] => 1992-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4657 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/301/05301160.pdf [firstpage_image] =>[orig_patent_app_number] => 840418 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/840418 		Computer including an integrated circuit having a low power selection control arrangement Feb 23, 1992 Issued
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