Search

Matthew Van Nguyen

Examiner (ID: 2067, Phone: (571)272-2081 , Office: P/2838 )

Most Active Art Unit
2838
Art Unit(s)
2839, 2111, 2838, 2102
Total Applications
3253
Issued Applications
3031
Pending Applications
87
Abandoned Applications
143

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18520814 [patent_doc_number] => 11710709 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-25 [patent_title] => Terminal member made of plurality of metal layers between two heat sinks [patent_app_type] => utility [patent_app_number] => 17/228033 [patent_app_country] => US [patent_app_date] => 2021-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 12831 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17228033 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/228033
Terminal member made of plurality of metal layers between two heat sinks Apr 11, 2021 Issued
Array ( [id] => 17174121 [patent_doc_number] => 20210327792 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-21 [patent_title] => PACKAGED STACKABLE ELECTRONIC POWER DEVICE FOR SURFACE MOUNTING AND CIRCUIT ARRANGEMENT [patent_app_type] => utility [patent_app_number] => 17/227030 [patent_app_country] => US [patent_app_date] => 2021-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11126 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17227030 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/227030
Packaged stackable electronic power device for surface mounting and circuit arrangement Apr 8, 2021 Issued
Array ( [id] => 17485990 [patent_doc_number] => 20220093494 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-24 [patent_title] => LEAD FRAME [patent_app_type] => utility [patent_app_number] => 17/225683 [patent_app_country] => US [patent_app_date] => 2021-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2824 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17225683 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/225683
Lead frame having a die pad with a plurality of grooves on an underside Apr 7, 2021 Issued
Array ( [id] => 17917570 [patent_doc_number] => 20220319966 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-06 [patent_title] => ISOLATED TEMPERATURE SENSOR DEVICE PACKAGE [patent_app_type] => utility [patent_app_number] => 17/219830 [patent_app_country] => US [patent_app_date] => 2021-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5294 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17219830 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/219830
Isolated temperature sensor device package Mar 30, 2021 Issued
Array ( [id] => 16966203 [patent_doc_number] => 20210217702 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-15 [patent_title] => SYSTEMS AND METHODS FOR INTERCONNECTING DIES [patent_app_type] => utility [patent_app_number] => 17/216278 [patent_app_country] => US [patent_app_date] => 2021-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7905 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17216278 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/216278
Die-to-die routing through a seal ring Mar 28, 2021 Issued
Array ( [id] => 18299785 [patent_doc_number] => 20230109471 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-06 [patent_title] => ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 17/913527 [patent_app_country] => US [patent_app_date] => 2021-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17167 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17913527 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/913527
ELECTRONIC DEVICE Mar 21, 2021 Issued
Array ( [id] => 17477413 [patent_doc_number] => 20220084917 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-17 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/201544 [patent_app_country] => US [patent_app_date] => 2021-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7766 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17201544 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/201544
Plurality of leads between MOSFET chips Mar 14, 2021 Issued
Array ( [id] => 16920516 [patent_doc_number] => 20210193608 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-24 [patent_title] => CIRCUIT BOARD ELEMENT AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/195649 [patent_app_country] => US [patent_app_date] => 2021-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8254 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17195649 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/195649
CIRCUIT BOARD ELEMENT AND MANUFACTURING METHOD THEREOF Mar 8, 2021 Abandoned
Array ( [id] => 18774353 [patent_doc_number] => 20230369184 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-16 [patent_title] => SEMICONDUCTOR MODULE [patent_app_type] => utility [patent_app_number] => 18/030652 [patent_app_country] => US [patent_app_date] => 2021-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6956 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18030652 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/030652
SEMICONDUCTOR MODULE Mar 4, 2021 Pending
Array ( [id] => 16914192 [patent_doc_number] => 20210187284 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-24 [patent_title] => IMPLANTABLE LEAD WITH FLEXIBLE PADDLE ELECTRODE ARRAY [patent_app_type] => utility [patent_app_number] => 17/190726 [patent_app_country] => US [patent_app_date] => 2021-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8913 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17190726 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/190726
Implantable lead with flexible paddle electrode array Mar 2, 2021 Issued
Array ( [id] => 17486050 [patent_doc_number] => 20220093554 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-24 [patent_title] => SEMICONDUCTOR MODULE [patent_app_type] => utility [patent_app_number] => 17/191272 [patent_app_country] => US [patent_app_date] => 2021-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4598 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17191272 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/191272
Recess portion in the surface of an interconnection layer mounted to a semiconductor device Mar 2, 2021 Issued
Array ( [id] => 18608101 [patent_doc_number] => 11749579 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-05 [patent_title] => Thermal structures adapted to electronic device heights in integrated circuit (IC) packages [patent_app_type] => utility [patent_app_number] => 17/188236 [patent_app_country] => US [patent_app_date] => 2021-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 8740 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17188236 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/188236
Thermal structures adapted to electronic device heights in integrated circuit (IC) packages Feb 28, 2021 Issued
Array ( [id] => 18425933 [patent_doc_number] => 20230180398 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-08 [patent_title] => CIRCUIT BOARD, METHOD FOR MANUFACTURING CIRCUIT BOARD, AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 17/924273 [patent_app_country] => US [patent_app_date] => 2021-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5561 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17924273 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/924273
CIRCUIT BOARD, METHOD FOR MANUFACTURING CIRCUIT BOARD, AND ELECTRONIC DEVICE Feb 28, 2021 Pending
Array ( [id] => 16890659 [patent_doc_number] => 20210176857 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-10 [patent_title] => STRESS RELIEF ENCAPSULATION FOR FLEXIBLE HYBRID ELECTRONICS [patent_app_type] => utility [patent_app_number] => 17/177654 [patent_app_country] => US [patent_app_date] => 2021-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7660 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17177654 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/177654
Stress relief encapsulation for flexible hybrid electronics Feb 16, 2021 Issued
Array ( [id] => 18482744 [patent_doc_number] => 11696513 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-04 [patent_title] => Magnetoresistance effect element and method for manufacturing the same [patent_app_type] => utility [patent_app_number] => 17/168579 [patent_app_country] => US [patent_app_date] => 2021-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4628 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17168579 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/168579
Magnetoresistance effect element and method for manufacturing the same Feb 4, 2021 Issued
Array ( [id] => 17100170 [patent_doc_number] => 20210287961 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-16 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/166418 [patent_app_country] => US [patent_app_date] => 2021-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4065 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17166418 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/166418
Filling member between a heat sink and substrate Feb 2, 2021 Issued
Array ( [id] => 18277057 [patent_doc_number] => 11616005 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-28 [patent_title] => Plurality of leads having a two stage recess [patent_app_type] => utility [patent_app_number] => 17/165032 [patent_app_country] => US [patent_app_date] => 2021-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 35 [patent_no_of_words] => 7765 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17165032 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/165032
Plurality of leads having a two stage recess Feb 1, 2021 Issued
Array ( [id] => 17780216 [patent_doc_number] => 20220246566 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-04 [patent_title] => MULTI-FUNCTION BOND PAD [patent_app_type] => utility [patent_app_number] => 17/162189 [patent_app_country] => US [patent_app_date] => 2021-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5849 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17162189 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/162189
Multi-function bond pad Jan 28, 2021 Issued
Array ( [id] => 18304437 [patent_doc_number] => 11626351 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-11 [patent_title] => Semiconductor package with barrier to contain thermal interface material [patent_app_type] => utility [patent_app_number] => 17/158234 [patent_app_country] => US [patent_app_date] => 2021-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 7092 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17158234 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/158234
Semiconductor package with barrier to contain thermal interface material Jan 25, 2021 Issued
Array ( [id] => 17100177 [patent_doc_number] => 20210287968 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-16 [patent_title] => SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/158388 [patent_app_country] => US [patent_app_date] => 2021-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7795 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17158388 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/158388
Method of attaching an insulation sheet to encapsulated semiconductor device Jan 25, 2021 Issued
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