Search

Matthew Van Nguyen

Examiner (ID: 2067, Phone: (571)272-2081 , Office: P/2838 )

Most Active Art Unit
2838
Art Unit(s)
2839, 2111, 2838, 2102
Total Applications
3253
Issued Applications
3031
Pending Applications
87
Abandoned Applications
143

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19507839 [patent_doc_number] => 12119269 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-15 [patent_title] => Array of vertical transistors having channel regions connected by an elongated conductor line [patent_app_type] => utility [patent_app_number] => 17/824744 [patent_app_country] => US [patent_app_date] => 2022-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 29 [patent_no_of_words] => 5819 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17824744 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/824744
Array of vertical transistors having channel regions connected by an elongated conductor line May 24, 2022 Issued
Array ( [id] => 18309128 [patent_doc_number] => 20230113028 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-13 [patent_title] => SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 17/750723 [patent_app_country] => US [patent_app_date] => 2022-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7897 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17750723 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/750723
SEMICONDUCTOR DEVICES May 22, 2022 Pending
Array ( [id] => 18283150 [patent_doc_number] => 20230098622 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-30 [patent_title] => SEMICONDUCTOR DEVICE INCLUDING FERROELECTRIC LAYER AND DIELECTRIC STRUCTURE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/749127 [patent_app_country] => US [patent_app_date] => 2022-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11304 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -34 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17749127 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/749127
SEMICONDUCTOR DEVICE INCLUDING FERROELECTRIC LAYER AND DIELECTRIC STRUCTURE AND METHOD OF MANUFACTURING THE SAME May 18, 2022 Pending
Array ( [id] => 18789043 [patent_doc_number] => 20230377653 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-23 [patent_title] => Memory Arrays Comprising Strings Of Memory Cells And Methods Used In Forming A Memory Array Comprising Strings Of Memory Cells [patent_app_type] => utility [patent_app_number] => 17/747166 [patent_app_country] => US [patent_app_date] => 2022-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7235 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17747166 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/747166
Memory Arrays Comprising Strings Of Memory Cells And Methods Used In Forming A Memory Array Comprising Strings Of Memory Cells May 17, 2022 Pending
Array ( [id] => 18143195 [patent_doc_number] => 20230017043 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-19 [patent_title] => IMAGE SENSOR, CAMERA DEVICE INCLUDING THE IMAGE SENSOR, ELECTRONIC DEVICE INCLUDING THE CAMERA DEVICE, AND METHOD OF MANUFACTURING THE IMAGE SENSOR [patent_app_type] => utility [patent_app_number] => 17/746042 [patent_app_country] => US [patent_app_date] => 2022-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12051 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17746042 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/746042
IMAGE SENSOR, CAMERA DEVICE INCLUDING THE IMAGE SENSOR, ELECTRONIC DEVICE INCLUDING THE CAMERA DEVICE, AND METHOD OF MANUFACTURING THE IMAGE SENSOR May 16, 2022 Issued
Array ( [id] => 18774350 [patent_doc_number] => 20230369181 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-16 [patent_title] => Semiconductor Device Arrangement with Compressible Adhesive [patent_app_type] => utility [patent_app_number] => 17/743601 [patent_app_country] => US [patent_app_date] => 2022-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7109 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17743601 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/743601
Semiconductor device arrangement with compressible adhesive May 12, 2022 Issued
Array ( [id] => 18464401 [patent_doc_number] => 11688697 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-27 [patent_title] => Emi shielding for flip chip package with exposed die backside [patent_app_type] => utility [patent_app_number] => 17/662977 [patent_app_country] => US [patent_app_date] => 2022-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 28 [patent_no_of_words] => 6160 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17662977 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/662977
Emi shielding for flip chip package with exposed die backside May 10, 2022 Issued
Array ( [id] => 20347679 [patent_doc_number] => 12471417 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-11 [patent_title] => Display panel having a quantum dot layer in a cavity between a plurality of substrates [patent_app_type] => utility [patent_app_number] => 17/737057 [patent_app_country] => US [patent_app_date] => 2022-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 4687 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17737057 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/737057
Display panel having a quantum dot layer in a cavity between a plurality of substrates May 4, 2022 Issued
Array ( [id] => 20204065 [patent_doc_number] => 12406848 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-02 [patent_title] => Method of fabricating a gate cut feature for multi-gate semiconductor devices [patent_app_type] => utility [patent_app_number] => 17/736898 [patent_app_country] => US [patent_app_date] => 2022-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 37 [patent_no_of_words] => 3364 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17736898 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/736898
Method of fabricating a gate cut feature for multi-gate semiconductor devices May 3, 2022 Issued
Array ( [id] => 19409152 [patent_doc_number] => 20240292663 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => Display Substrate and Display Apparatus [patent_app_type] => utility [patent_app_number] => 18/022998 [patent_app_country] => US [patent_app_date] => 2022-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11645 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18022998 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/022998
Display Substrate and Display Apparatus Apr 24, 2022 Pending
Array ( [id] => 17795630 [patent_doc_number] => 20220254722 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-11 [patent_title] => PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/728919 [patent_app_country] => US [patent_app_date] => 2022-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9850 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17728919 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/728919
Package structure with reinforcement structures in a redistribution circuit structure and manufacturing method thereof Apr 24, 2022 Issued
Array ( [id] => 18528700 [patent_doc_number] => 11715703 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-01 [patent_title] => EMI shielding for flip chip package with exposed die backside [patent_app_type] => utility [patent_app_number] => 17/660093 [patent_app_country] => US [patent_app_date] => 2022-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 26 [patent_no_of_words] => 4481 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17660093 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/660093
EMI shielding for flip chip package with exposed die backside Apr 20, 2022 Issued
Array ( [id] => 19494278 [patent_doc_number] => 12113001 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-08 [patent_title] => Lead frame assembly having a plurality of dicing holes [patent_app_type] => utility [patent_app_number] => 17/721072 [patent_app_country] => US [patent_app_date] => 2022-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2893 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17721072 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/721072
Lead frame assembly having a plurality of dicing holes Apr 13, 2022 Issued
Array ( [id] => 20177406 [patent_doc_number] => 12396171 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-19 [patent_title] => Method of fabricating three-dimensional NAND memory [patent_app_type] => utility [patent_app_number] => 17/709668 [patent_app_country] => US [patent_app_date] => 2022-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 14917 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17709668 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/709668
Method of fabricating three-dimensional NAND memory Mar 30, 2022 Issued
Array ( [id] => 17933607 [patent_doc_number] => 20220328733 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-13 [patent_title] => COLOR CONVERSION STRUCTURE, DISPLAY APPARATUS, AND METHOD OF MANUFACTURING THE DISPLAY APPARATUS [patent_app_type] => utility [patent_app_number] => 17/708332 [patent_app_country] => US [patent_app_date] => 2022-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10425 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -32 [patent_words_short_claim] => 19 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17708332 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/708332
Color conversion structure including quantum dot layer, display apparatus including the color conversion structure, and method of manufacturing display apparatus including the color conversion structure Mar 29, 2022 Issued
Array ( [id] => 17738028 [patent_doc_number] => 20220223490 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-14 [patent_title] => SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/705382 [patent_app_country] => US [patent_app_date] => 2022-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11086 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17705382 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/705382
Sensing component encapsulated by an encapsulant with a roughness surface having a hollow region Mar 26, 2022 Issued
Array ( [id] => 17900913 [patent_doc_number] => 20220310575 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-29 [patent_title] => MICRO-LED DISPLAYS TO REDUCE SUBPIXEL CROSSTALK [patent_app_type] => utility [patent_app_number] => 17/701607 [patent_app_country] => US [patent_app_date] => 2022-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6341 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17701607 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/701607
MICRO-LED DISPLAYS TO REDUCE SUBPIXEL CROSSTALK Mar 21, 2022 Pending
Array ( [id] => 17918685 [patent_doc_number] => 20220321081 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-06 [patent_title] => METHOD OF MANUFACTURING A SELF-SHIELDED ACOUSTIC WAVE DEVICE PACKAGE [patent_app_type] => utility [patent_app_number] => 17/655886 [patent_app_country] => US [patent_app_date] => 2022-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6641 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17655886 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/655886
Method of manufacturing a self-shielded acoustic wave device package Mar 21, 2022 Issued
Array ( [id] => 19765923 [patent_doc_number] => 12224224 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-11 [patent_title] => Package structure with metallic layer over the surfaces of a plurality of semiconductor dies [patent_app_type] => utility [patent_app_number] => 17/693444 [patent_app_country] => US [patent_app_date] => 2022-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 7970 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17693444 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/693444
Package structure with metallic layer over the surfaces of a plurality of semiconductor dies Mar 13, 2022 Issued
Array ( [id] => 20132282 [patent_doc_number] => 12374600 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-29 [patent_title] => Dam structure on lid to constrain a thermal interface material in a semiconductor device package structure and methods for forming the same [patent_app_type] => utility [patent_app_number] => 17/693520 [patent_app_country] => US [patent_app_date] => 2022-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 5332 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17693520 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/693520
Dam structure on lid to constrain a thermal interface material in a semiconductor device package structure and methods for forming the same Mar 13, 2022 Issued
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