Search

Maura K. Regan

Examiner (ID: 8524)

Most Active Art Unit
2607
Art Unit(s)
2899, 2858, 2607, 2213
Total Applications
698
Issued Applications
615
Pending Applications
13
Abandoned Applications
70

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4844448 [patent_doc_number] => 20080180856 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-31 [patent_title] => 'Method and apparatus for a microactuator bonding pad structure for solder ball placement and reflow joint' [patent_app_type] => utility [patent_app_number] => 11/701078 [patent_app_country] => US [patent_app_date] => 2007-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 4946 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0180/20080180856.pdf [firstpage_image] =>[orig_patent_app_number] => 11701078 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/701078
Method and apparatus for a microactuator bonding pad structure for solder ball placement and reflow joint Jan 30, 2007 Abandoned
Array ( [id] => 5210566 [patent_doc_number] => 20070249150 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-25 [patent_title] => 'Method of Forming a Metal Line and Method of Manufacturing a Display Substrate by Using the Same' [patent_app_type] => utility [patent_app_number] => 11/669639 [patent_app_country] => US [patent_app_date] => 2007-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 5663 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0249/20070249150.pdf [firstpage_image] =>[orig_patent_app_number] => 11669639 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/669639
Method of Forming a Metal Line and Method of Manufacturing a Display Substrate by Using the Same Jan 30, 2007 Abandoned
Array ( [id] => 5101330 [patent_doc_number] => 20070184592 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-09 [patent_title] => 'Method for manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/700178 [patent_app_country] => US [patent_app_date] => 2007-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8389 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0184/20070184592.pdf [firstpage_image] =>[orig_patent_app_number] => 11700178 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/700178
Method for manufacturing semiconductor device Jan 30, 2007 Abandoned
Array ( [id] => 4820671 [patent_doc_number] => 20080121977 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-29 [patent_title] => 'Semiconductor device and method of manufacturing having the same' [patent_app_type] => utility [patent_app_number] => 11/699419 [patent_app_country] => US [patent_app_date] => 2007-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5109 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0121/20080121977.pdf [firstpage_image] =>[orig_patent_app_number] => 11699419 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/699419
Semiconductor device and method of manufacturing having the same Jan 29, 2007 Abandoned
Array ( [id] => 232684 [patent_doc_number] => 07598109 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-10-06 [patent_title] => 'Method for fabricating micrometer or nanometer channels' [patent_app_type] => utility [patent_app_number] => 11/668379 [patent_app_country] => US [patent_app_date] => 2007-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2511 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 20 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/598/07598109.pdf [firstpage_image] =>[orig_patent_app_number] => 11668379 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/668379
Method for fabricating micrometer or nanometer channels Jan 28, 2007 Issued
Array ( [id] => 191280 [patent_doc_number] => 07642593 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-01-05 [patent_title] => 'Nonvolatile memory device and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 11/698658 [patent_app_country] => US [patent_app_date] => 2007-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 4763 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/642/07642593.pdf [firstpage_image] =>[orig_patent_app_number] => 11698658 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/698658
Nonvolatile memory device and method of fabricating the same Jan 25, 2007 Issued
Array ( [id] => 4762675 [patent_doc_number] => 20080173884 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-24 [patent_title] => 'Wafer level phosphor coating method and devices fabricated utilizing method' [patent_app_type] => utility [patent_app_number] => 11/656759 [patent_app_country] => US [patent_app_date] => 2007-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 10716 [patent_no_of_claims] => 79 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0173/20080173884.pdf [firstpage_image] =>[orig_patent_app_number] => 11656759 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/656759
Wafer level phosphor coating method and devices fabricated utilizing method Jan 21, 2007 Issued
Array ( [id] => 5177616 [patent_doc_number] => 20070178676 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-02 [patent_title] => 'Method of forming semiconductor multi-layered structure' [patent_app_type] => utility [patent_app_number] => 11/655138 [patent_app_country] => US [patent_app_date] => 2007-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8079 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0178/20070178676.pdf [firstpage_image] =>[orig_patent_app_number] => 11655138 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/655138
Method of forming semiconductor multi-layered structure Jan 18, 2007 Abandoned
Array ( [id] => 5069645 [patent_doc_number] => 20070190747 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-16 [patent_title] => 'Wafer level packaging to lidded chips' [patent_app_type] => utility [patent_app_number] => 11/655739 [patent_app_country] => US [patent_app_date] => 2007-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 47 [patent_figures_cnt] => 47 [patent_no_of_words] => 28316 [patent_no_of_claims] => 51 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0190/20070190747.pdf [firstpage_image] =>[orig_patent_app_number] => 11655739 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/655739
Wafer level packaging to lidded chips Jan 18, 2007 Abandoned
Array ( [id] => 7689315 [patent_doc_number] => 20070105383 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-10 [patent_title] => 'PHOTOACTIVE ADHESION PROMOTER IN A SLAM' [patent_app_type] => utility [patent_app_number] => 11/620516 [patent_app_country] => US [patent_app_date] => 2007-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2798 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0105/20070105383.pdf [firstpage_image] =>[orig_patent_app_number] => 11620516 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/620516
Photoactive adhesion promoter in a SLAM Jan 4, 2007 Issued
Array ( [id] => 5483208 [patent_doc_number] => 20090272973 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-11-05 [patent_title] => 'Semiconductor wafer including semiconductor chips divided by scribe line and process-monitor electrode pads formed on scribe line' [patent_app_type] => utility [patent_app_number] => 11/794649 [patent_app_country] => US [patent_app_date] => 2006-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 11023 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0272/20090272973.pdf [firstpage_image] =>[orig_patent_app_number] => 11794649 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/794649
Semiconductor wafer including semiconductor chips divided by scribe line and process-monitor electrode pads formed on scribe line Nov 21, 2006 Issued
Array ( [id] => 4896922 [patent_doc_number] => 20080116535 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-22 [patent_title] => 'Methods and apparatus for a dual-metal magnetic shield structure' [patent_app_type] => utility [patent_app_number] => 11/602639 [patent_app_country] => US [patent_app_date] => 2006-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2968 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0116/20080116535.pdf [firstpage_image] =>[orig_patent_app_number] => 11602639 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/602639
Methods and apparatus for a dual-metal magnetic shield structure Nov 20, 2006 Issued
Array ( [id] => 5056965 [patent_doc_number] => 20070059887 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-15 [patent_title] => 'Method for producing a trench transistor and trench transistor' [patent_app_type] => utility [patent_app_number] => 11/512749 [patent_app_country] => US [patent_app_date] => 2006-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5784 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20070059887.pdf [firstpage_image] =>[orig_patent_app_number] => 11512749 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/512749
Method for producing a trench transistor and trench transistor Aug 29, 2006 Issued
Array ( [id] => 4733897 [patent_doc_number] => 20080050876 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-28 [patent_title] => 'METHOD FOR FABRICATING SILICON CARBIDE VERTICAL MOSFET DEVICES' [patent_app_type] => utility [patent_app_number] => 11/466488 [patent_app_country] => US [patent_app_date] => 2006-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 3893 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0050/20080050876.pdf [firstpage_image] =>[orig_patent_app_number] => 11466488 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/466488
Method for fabricating silicon carbide vertical MOSFET devices Aug 22, 2006 Issued
Array ( [id] => 4999940 [patent_doc_number] => 20070042574 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-22 [patent_title] => 'Method for manufacturing a semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/503968 [patent_app_country] => US [patent_app_date] => 2006-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5235 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0042/20070042574.pdf [firstpage_image] =>[orig_patent_app_number] => 11503968 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/503968
Method for manufacturing a semiconductor device Aug 14, 2006 Abandoned
Array ( [id] => 203421 [patent_doc_number] => 07633138 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-12-15 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/502429 [patent_app_country] => US [patent_app_date] => 2006-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 4210 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/633/07633138.pdf [firstpage_image] =>[orig_patent_app_number] => 11502429 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/502429
Semiconductor device and method of manufacturing the same Aug 10, 2006 Issued
Array ( [id] => 8351984 [patent_doc_number] => 08247311 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-21 [patent_title] => 'Laser processing method' [patent_app_type] => utility [patent_app_number] => 12/063560 [patent_app_country] => US [patent_app_date] => 2006-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 7214 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12063560 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/063560
Laser processing method Aug 3, 2006 Issued
Array ( [id] => 5056961 [patent_doc_number] => 20070059883 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-15 [patent_title] => 'METHOD OF FABRICATING TRAP NONVOLATILE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 11/459599 [patent_app_country] => US [patent_app_date] => 2006-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 34 [patent_no_of_words] => 10562 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20070059883.pdf [firstpage_image] =>[orig_patent_app_number] => 11459599 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/459599
METHOD OF FABRICATING TRAP NONVOLATILE MEMORY DEVICE Jul 23, 2006 Abandoned
Array ( [id] => 4913113 [patent_doc_number] => 20080093712 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-24 [patent_title] => 'Chip with Light Protection Layer' [patent_app_type] => utility [patent_app_number] => 11/572789 [patent_app_country] => US [patent_app_date] => 2006-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3266 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0093/20080093712.pdf [firstpage_image] =>[orig_patent_app_number] => 11572789 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/572789
Chip with Light Protection Layer Jul 19, 2006 Abandoned
Array ( [id] => 5561644 [patent_doc_number] => 20090134496 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-28 [patent_title] => 'WAFER AND METHOD OF FORMING ALIGNMENT MARKERS' [patent_app_type] => utility [patent_app_number] => 12/305109 [patent_app_country] => US [patent_app_date] => 2006-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2468 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0134/20090134496.pdf [firstpage_image] =>[orig_patent_app_number] => 12305109 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/305109
WAFER AND METHOD OF FORMING ALIGNMENT MARKERS Jul 5, 2006 Abandoned
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