Search

Max Mathew

Examiner (ID: 12068, Phone: (571)272-2378 , Office: P/2649 )

Most Active Art Unit
2649
Art Unit(s)
2644, 2649
Total Applications
304
Issued Applications
248
Pending Applications
0
Abandoned Applications
58

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16348114 [patent_doc_number] => 20200312765 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-01 [patent_title] => MEMORY DIE CONTAINING STRESS REDUCING BACKSIDE CONTACT VIA STRUCTURES AND METHOD OF MAKING THE SAME [patent_app_type] => utility [patent_app_number] => 16/516726 [patent_app_country] => US [patent_app_date] => 2019-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 42639 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16516726 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/516726
Memory die containing stress reducing backside contact via structures and method of making the same Jul 18, 2019 Issued
Array ( [id] => 16560614 [patent_doc_number] => 20210005763 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-07 [patent_title] => SUPERLATTICE PHOTO DETECTOR [patent_app_type] => utility [patent_app_number] => 16/502108 [patent_app_country] => US [patent_app_date] => 2019-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8639 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16502108 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/502108
Superlattice photo detector Jul 2, 2019 Issued
Array ( [id] => 16187141 [patent_doc_number] => 10720482 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-21 [patent_title] => Light emitting element display device [patent_app_type] => utility [patent_app_number] => 16/460026 [patent_app_country] => US [patent_app_date] => 2019-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 43 [patent_no_of_words] => 13476 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 291 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16460026 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/460026
Light emitting element display device Jul 1, 2019 Issued
Array ( [id] => 17063173 [patent_doc_number] => 11107783 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-31 [patent_title] => Wafer-level package including under bump metal layer [patent_app_type] => utility [patent_app_number] => 16/408727 [patent_app_country] => US [patent_app_date] => 2019-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 27 [patent_no_of_words] => 5586 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16408727 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/408727
Wafer-level package including under bump metal layer May 9, 2019 Issued
Array ( [id] => 16440359 [patent_doc_number] => 20200357686 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-12 [patent_title] => DOUBLE METAL DOUBLE PATTERNING WITH VIAS EXTENDING INTO DIELECTRIC [patent_app_type] => utility [patent_app_number] => 16/408783 [patent_app_country] => US [patent_app_date] => 2019-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6471 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16408783 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/408783
Double metal double patterning with vias extending into dielectric May 9, 2019 Issued
Array ( [id] => 15713049 [patent_doc_number] => 20200103290 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-02 [patent_title] => MICRO-ELECTRO-MECHANICAL SYSTEM (MEMS) THERMAL SENSOR [patent_app_type] => utility [patent_app_number] => 16/408769 [patent_app_country] => US [patent_app_date] => 2019-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12449 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16408769 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/408769
Micro-electro-mechanical system (MEMS) thermal sensor May 9, 2019 Issued
Array ( [id] => 17063283 [patent_doc_number] => 11107896 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-31 [patent_title] => Vertical interconnect features and methods of forming [patent_app_type] => utility [patent_app_number] => 16/408584 [patent_app_country] => US [patent_app_date] => 2019-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8198 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16408584 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/408584
Vertical interconnect features and methods of forming May 9, 2019 Issued
Array ( [id] => 16001053 [patent_doc_number] => 20200176397 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-04 [patent_title] => Integrated Circuit Package and Method [patent_app_type] => utility [patent_app_number] => 16/408620 [patent_app_country] => US [patent_app_date] => 2019-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11378 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16408620 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/408620
Integrated circuit package and method May 9, 2019 Issued
Array ( [id] => 16440553 [patent_doc_number] => 20200357880 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-12 [patent_title] => CAPACITOR STRUCTURE FOR INTEGRATED CIRCUIT, AND RELATED METHODS [patent_app_type] => utility [patent_app_number] => 16/408536 [patent_app_country] => US [patent_app_date] => 2019-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6909 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16408536 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/408536
Capacitor structure for integrated circuit, and related methods May 9, 2019 Issued
Array ( [id] => 16402447 [patent_doc_number] => 20200343305 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-29 [patent_title] => IMPLEMENTING MEMRISTOR CROSSBAR ARRAY USING NON-FILAMENTARY RRAM CELLS [patent_app_type] => utility [patent_app_number] => 16/393883 [patent_app_country] => US [patent_app_date] => 2019-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2954 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16393883 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/393883
Implementing memristor crossbar array using non-filamentary RRAM cells Apr 23, 2019 Issued
Array ( [id] => 14722541 [patent_doc_number] => 20190252334 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-15 [patent_title] => Semiconductor Device and Method of Manufacture [patent_app_type] => utility [patent_app_number] => 16/390814 [patent_app_country] => US [patent_app_date] => 2019-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10823 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16390814 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/390814
Semiconductor device and method of manufacture Apr 21, 2019 Issued
Array ( [id] => 16394571 [patent_doc_number] => 20200335512 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-22 [patent_title] => BONDED DIE ASSEMBLY USING A FACE-TO-BACK OXIDE BONDING AND METHODS FOR MAKING THE SAME [patent_app_type] => utility [patent_app_number] => 16/385010 [patent_app_country] => US [patent_app_date] => 2019-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18016 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16385010 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/385010
Bonded die assembly using a face-to-back oxide bonding and methods for making the same Apr 15, 2019 Issued
Array ( [id] => 16379441 [patent_doc_number] => 20200328284 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-15 [patent_title] => Assemblies Which Include Wordlines Having a First Metal-Containing Material at Least Partially Surrounding a Second Metal-Containing Material and Having Different Crystallinity than the Second Metal-Containing Material [patent_app_type] => utility [patent_app_number] => 16/383862 [patent_app_country] => US [patent_app_date] => 2019-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6043 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -42 [patent_words_short_claim] => 18 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16383862 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/383862
Assemblies which include wordlines having a first metal-containing material at least partially surrounding a second metal-containing material and having different crystallinity than the second metal-containing material Apr 14, 2019 Issued
Array ( [id] => 15791769 [patent_doc_number] => 10629617 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-21 [patent_title] => Semiconductor device and manufacturing method of the same [patent_app_type] => utility [patent_app_number] => 16/384764 [patent_app_country] => US [patent_app_date] => 2019-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 38 [patent_no_of_words] => 8395 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16384764 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/384764
Semiconductor device and manufacturing method of the same Apr 14, 2019 Issued
Array ( [id] => 16264652 [patent_doc_number] => 10756099 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-25 [patent_title] => Memory device and method for manufacturing the same [patent_app_type] => utility [patent_app_number] => 16/382743 [patent_app_country] => US [patent_app_date] => 2019-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 21 [patent_no_of_words] => 6559 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 268 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16382743 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/382743
Memory device and method for manufacturing the same Apr 11, 2019 Issued
Array ( [id] => 15078071 [patent_doc_number] => 10468536 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-05 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 16/381479 [patent_app_country] => US [patent_app_date] => 2019-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 53 [patent_no_of_words] => 23876 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16381479 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/381479
Semiconductor device Apr 10, 2019 Issued
Array ( [id] => 15078071 [patent_doc_number] => 10468536 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-05 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 16/381479 [patent_app_country] => US [patent_app_date] => 2019-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 53 [patent_no_of_words] => 23876 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16381479 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/381479
Semiconductor device Apr 10, 2019 Issued
Array ( [id] => 15078071 [patent_doc_number] => 10468536 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-05 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 16/381479 [patent_app_country] => US [patent_app_date] => 2019-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 53 [patent_no_of_words] => 23876 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16381479 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/381479
Semiconductor device Apr 10, 2019 Issued
Array ( [id] => 15078071 [patent_doc_number] => 10468536 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-05 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 16/381479 [patent_app_country] => US [patent_app_date] => 2019-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 53 [patent_no_of_words] => 23876 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16381479 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/381479
Semiconductor device Apr 10, 2019 Issued
Array ( [id] => 16264663 [patent_doc_number] => 10756110 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-08-25 [patent_title] => Method of forming seamless drain-select-level electrodes for a three-dimensional memory device and structures formed by the same [patent_app_type] => utility [patent_app_number] => 16/380362 [patent_app_country] => US [patent_app_date] => 2019-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 59 [patent_figures_cnt] => 65 [patent_no_of_words] => 23595 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16380362 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/380362
Method of forming seamless drain-select-level electrodes for a three-dimensional memory device and structures formed by the same Apr 9, 2019 Issued
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