
M. D. K. Talukder
Examiner (ID: 9110)
| Most Active Art Unit | 2648 |
| Art Unit(s) | 2648, 2618 |
| Total Applications | 921 |
| Issued Applications | 699 |
| Pending Applications | 81 |
| Abandoned Applications | 161 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 18562906
[patent_doc_number] => 11728158
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-08-15
[patent_title] => Semiconductor structure and method for preparing the same
[patent_app_type] => utility
[patent_app_number] => 17/465687
[patent_app_country] => US
[patent_app_date] => 2021-09-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 5
[patent_no_of_words] => 4395
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 214
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17465687
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/465687 | Semiconductor structure and method for preparing the same | Sep 1, 2021 | Issued |
Array
(
[id] => 18219471
[patent_doc_number] => 11594420
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2023-02-28
[patent_title] => Semiconductor structure and manufacturing method thereof
[patent_app_type] => utility
[patent_app_number] => 17/460337
[patent_app_country] => US
[patent_app_date] => 2021-08-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 8001
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17460337
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/460337 | Semiconductor structure and manufacturing method thereof | Aug 29, 2021 | Issued |
Array
(
[id] => 17482403
[patent_doc_number] => 20220089907
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-03-24
[patent_title] => POLISHING COMPOSITION
[patent_app_type] => utility
[patent_app_number] => 17/412919
[patent_app_country] => US
[patent_app_date] => 2021-08-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8275
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 47
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17412919
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/412919 | POLISHING COMPOSITION | Aug 25, 2021 | Abandoned |
Array
(
[id] => 19781466
[patent_doc_number] => 12230504
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-02-18
[patent_title] => Plasma etching method and plasma etching apparatus
[patent_app_type] => utility
[patent_app_number] => 17/411475
[patent_app_country] => US
[patent_app_date] => 2021-08-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 4193
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 22
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17411475
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/411475 | Plasma etching method and plasma etching apparatus | Aug 24, 2021 | Issued |
Array
(
[id] => 19079427
[patent_doc_number] => 11948803
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-04-02
[patent_title] => Methods for passivating sidewalls of semiconductor wafers and semiconductor devices incorporating semiconductor wafers
[patent_app_type] => utility
[patent_app_number] => 17/410432
[patent_app_country] => US
[patent_app_date] => 2021-08-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 14
[patent_no_of_words] => 8598
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 290
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17410432
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/410432 | Methods for passivating sidewalls of semiconductor wafers and semiconductor devices incorporating semiconductor wafers | Aug 23, 2021 | Issued |
Array
(
[id] => 17509058
[patent_doc_number] => 20220102161
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-03-31
[patent_title] => SUBSTRATE PROCESSING METHOD
[patent_app_type] => utility
[patent_app_number] => 17/399543
[patent_app_country] => US
[patent_app_date] => 2021-08-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14968
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17399543
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/399543 | Substrate processing method | Aug 10, 2021 | Issued |
Array
(
[id] => 17416996
[patent_doc_number] => 20220051900
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-02-17
[patent_title] => PATTERN FORMING METHOD
[patent_app_type] => utility
[patent_app_number] => 17/396380
[patent_app_country] => US
[patent_app_date] => 2021-08-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3940
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17396380
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/396380 | Pattern forming method | Aug 5, 2021 | Issued |
Array
(
[id] => 17485906
[patent_doc_number] => 20220093410
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-03-24
[patent_title] => METHOD FOR PREPARING SEMICONDUCTOR SAMPLE WITH ETCHED PIT SUITABLE FOR MICROSCOPE OBSERVATION
[patent_app_type] => utility
[patent_app_number] => 17/392418
[patent_app_country] => US
[patent_app_date] => 2021-08-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4054
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17392418
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/392418 | Method for preparing semiconductor sample with etched pit suitable for microscope observation | Aug 2, 2021 | Issued |
Array
(
[id] => 19370477
[patent_doc_number] => 12062571
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-08-13
[patent_title] => Selective etching process for SiGe and doped epitaxial silicon
[patent_app_type] => utility
[patent_app_number] => 17/389977
[patent_app_country] => US
[patent_app_date] => 2021-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 17
[patent_no_of_words] => 7329
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 259
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17389977
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/389977 | Selective etching process for SiGe and doped epitaxial silicon | Jul 29, 2021 | Issued |
Array
(
[id] => 19370477
[patent_doc_number] => 12062571
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-08-13
[patent_title] => Selective etching process for SiGe and doped epitaxial silicon
[patent_app_type] => utility
[patent_app_number] => 17/389977
[patent_app_country] => US
[patent_app_date] => 2021-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 17
[patent_no_of_words] => 7329
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 259
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17389977
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/389977 | Selective etching process for SiGe and doped epitaxial silicon | Jul 29, 2021 | Issued |
Array
(
[id] => 19370477
[patent_doc_number] => 12062571
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-08-13
[patent_title] => Selective etching process for SiGe and doped epitaxial silicon
[patent_app_type] => utility
[patent_app_number] => 17/389977
[patent_app_country] => US
[patent_app_date] => 2021-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 17
[patent_no_of_words] => 7329
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 259
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17389977
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/389977 | Selective etching process for SiGe and doped epitaxial silicon | Jul 29, 2021 | Issued |
Array
(
[id] => 19370477
[patent_doc_number] => 12062571
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-08-13
[patent_title] => Selective etching process for SiGe and doped epitaxial silicon
[patent_app_type] => utility
[patent_app_number] => 17/389977
[patent_app_country] => US
[patent_app_date] => 2021-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 17
[patent_no_of_words] => 7329
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 259
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17389977
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/389977 | Selective etching process for SiGe and doped epitaxial silicon | Jul 29, 2021 | Issued |
Array
(
[id] => 19370477
[patent_doc_number] => 12062571
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-08-13
[patent_title] => Selective etching process for SiGe and doped epitaxial silicon
[patent_app_type] => utility
[patent_app_number] => 17/389977
[patent_app_country] => US
[patent_app_date] => 2021-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 17
[patent_no_of_words] => 7329
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 259
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17389977
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/389977 | Selective etching process for SiGe and doped epitaxial silicon | Jul 29, 2021 | Issued |
Array
(
[id] => 19370477
[patent_doc_number] => 12062571
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-08-13
[patent_title] => Selective etching process for SiGe and doped epitaxial silicon
[patent_app_type] => utility
[patent_app_number] => 17/389977
[patent_app_country] => US
[patent_app_date] => 2021-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 17
[patent_no_of_words] => 7329
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 259
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17389977
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/389977 | Selective etching process for SiGe and doped epitaxial silicon | Jul 29, 2021 | Issued |
Array
(
[id] => 19370477
[patent_doc_number] => 12062571
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-08-13
[patent_title] => Selective etching process for SiGe and doped epitaxial silicon
[patent_app_type] => utility
[patent_app_number] => 17/389977
[patent_app_country] => US
[patent_app_date] => 2021-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 17
[patent_no_of_words] => 7329
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 259
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17389977
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/389977 | Selective etching process for SiGe and doped epitaxial silicon | Jul 29, 2021 | Issued |
Array
(
[id] => 19370477
[patent_doc_number] => 12062571
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-08-13
[patent_title] => Selective etching process for SiGe and doped epitaxial silicon
[patent_app_type] => utility
[patent_app_number] => 17/389977
[patent_app_country] => US
[patent_app_date] => 2021-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 17
[patent_no_of_words] => 7329
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 259
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17389977
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/389977 | Selective etching process for SiGe and doped epitaxial silicon | Jul 29, 2021 | Issued |
Array
(
[id] => 19370477
[patent_doc_number] => 12062571
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-08-13
[patent_title] => Selective etching process for SiGe and doped epitaxial silicon
[patent_app_type] => utility
[patent_app_number] => 17/389977
[patent_app_country] => US
[patent_app_date] => 2021-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 17
[patent_no_of_words] => 7329
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 259
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17389977
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/389977 | Selective etching process for SiGe and doped epitaxial silicon | Jul 29, 2021 | Issued |
Array
(
[id] => 17386124
[patent_doc_number] => 20220033976
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-02-03
[patent_title] => METHOD FOR INHIBITING GENERATION OF RUTHENIUM-CONTAINING GAS FROM RUTHENIUM-CONTAINING LIQUID
[patent_app_type] => utility
[patent_app_number] => 17/386135
[patent_app_country] => US
[patent_app_date] => 2021-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6812
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 23
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17386135
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/386135 | METHOD FOR INHIBITING GENERATION OF RUTHENIUM-CONTAINING GAS FROM RUTHENIUM-CONTAINING LIQUID | Jul 26, 2021 | Abandoned |
Array
(
[id] => 20118334
[patent_doc_number] => 12368051
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-07-22
[patent_title] => Semiconductor test sample and manufacturing method thereof
[patent_app_type] => utility
[patent_app_number] => 17/602898
[patent_app_country] => US
[patent_app_date] => 2021-07-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 10
[patent_no_of_words] => 0
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 118
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17602898
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/602898 | Semiconductor test sample and manufacturing method thereof | Jul 21, 2021 | Issued |
Array
(
[id] => 18141775
[patent_doc_number] => 20230015618
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-01-19
[patent_title] => METHOD FOR FORMING SEMICONDUCTOR STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 17/378419
[patent_app_country] => US
[patent_app_date] => 2021-07-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7309
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17378419
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/378419 | Method for forming semiconductor structure | Jul 15, 2021 | Issued |