Search

Meiya Li

Examiner (ID: 2397, Phone: (571)270-1572 , Office: P/2811 )

Most Active Art Unit
2811
Art Unit(s)
2811
Total Applications
1052
Issued Applications
658
Pending Applications
107
Abandoned Applications
324

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18520895 [patent_doc_number] => 11710790 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-25 [patent_title] => Memory array channel regions [patent_app_type] => utility [patent_app_number] => 17/150522 [patent_app_country] => US [patent_app_date] => 2021-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 57 [patent_figures_cnt] => 57 [patent_no_of_words] => 9864 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17150522 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/150522
Memory array channel regions Jan 14, 2021 Issued
Array ( [id] => 18016447 [patent_doc_number] => 11508754 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-22 [patent_title] => Semiconductor memory structure and method for forming the same [patent_app_type] => utility [patent_app_number] => 17/142166 [patent_app_country] => US [patent_app_date] => 2021-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 5531 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17142166 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/142166
Semiconductor memory structure and method for forming the same Jan 4, 2021 Issued
Array ( [id] => 17723513 [patent_doc_number] => 20220216235 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-07 [patent_title] => SEMICONDUCTOR MEMORY STRUCTURE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/141915 [patent_app_country] => US [patent_app_date] => 2021-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6715 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17141915 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/141915
Semiconductor memory structure and method of manufacturing the same Jan 4, 2021 Issued
Array ( [id] => 18417567 [patent_doc_number] => 11672126 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-06 [patent_title] => Three-dimensional memory device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 17/137768 [patent_app_country] => US [patent_app_date] => 2020-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 35 [patent_no_of_words] => 15036 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17137768 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/137768
Three-dimensional memory device and manufacturing method thereof Dec 29, 2020 Issued
Array ( [id] => 16781802 [patent_doc_number] => 20210118881 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-22 [patent_title] => SELF-ALIGNED METAL GATE WITH POLY SILICIDE FOR VERTICAL TRANSPORT FIELD-EFFECT TRANSISTORS [patent_app_type] => utility [patent_app_number] => 17/133157 [patent_app_country] => US [patent_app_date] => 2020-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7125 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17133157 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/133157
Self-aligned metal gate with poly silicide for vertical transport field-effect transistors Dec 22, 2020 Issued
Array ( [id] => 17318994 [patent_doc_number] => 20210408044 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-30 [patent_title] => MEMORY ARRAY ISOLATION STRUCTURES [patent_app_type] => utility [patent_app_number] => 17/119346 [patent_app_country] => US [patent_app_date] => 2020-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10560 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17119346 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/119346
Memory array isolation structures Dec 10, 2020 Issued
Array ( [id] => 18891164 [patent_doc_number] => 11869943 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-09 [patent_title] => Silicon carbide semiconductor device [patent_app_type] => utility [patent_app_number] => 17/118964 [patent_app_country] => US [patent_app_date] => 2020-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 3576 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 356 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17118964 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/118964
Silicon carbide semiconductor device Dec 10, 2020 Issued
Array ( [id] => 16904921 [patent_doc_number] => 20210183837 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-17 [patent_title] => DISPLAY APPARATUS HAVING DISPLAY MODULE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/119047 [patent_app_country] => US [patent_app_date] => 2020-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17867 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17119047 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/119047
DISPLAY APPARATUS HAVING DISPLAY MODULE AND METHOD OF MANUFACTURING THE SAME Dec 10, 2020 Abandoned
Array ( [id] => 19063176 [patent_doc_number] => 11942428 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-26 [patent_title] => Inductors with through-substrate via cores [patent_app_type] => utility [patent_app_number] => 17/108589 [patent_app_country] => US [patent_app_date] => 2020-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 18 [patent_no_of_words] => 7536 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17108589 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/108589
Inductors with through-substrate via cores Nov 30, 2020 Issued
Array ( [id] => 18105515 [patent_doc_number] => 11545412 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-03 [patent_title] => Package structure and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 16/952080 [patent_app_country] => US [patent_app_date] => 2020-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 18 [patent_no_of_words] => 7504 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 293 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16952080 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/952080
Package structure and manufacturing method thereof Nov 18, 2020 Issued
Array ( [id] => 16692130 [patent_doc_number] => 20210074609 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-11 [patent_title] => SEMICONDUCTOR DEVICE WITH SEALED SEMICONDUCTOR CHIP [patent_app_type] => utility [patent_app_number] => 16/952968 [patent_app_country] => US [patent_app_date] => 2020-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10135 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16952968 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/952968
Semiconductor device with sealed semiconductor chip Nov 18, 2020 Issued
Array ( [id] => 16692130 [patent_doc_number] => 20210074609 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-11 [patent_title] => SEMICONDUCTOR DEVICE WITH SEALED SEMICONDUCTOR CHIP [patent_app_type] => utility [patent_app_number] => 16/952968 [patent_app_country] => US [patent_app_date] => 2020-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10135 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16952968 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/952968
Semiconductor device with sealed semiconductor chip Nov 18, 2020 Issued
Array ( [id] => 18670069 [patent_doc_number] => 11776981 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-03 [patent_title] => Eliminating interconnect strains in microcircuits [patent_app_type] => utility [patent_app_number] => 16/951573 [patent_app_country] => US [patent_app_date] => 2020-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3055 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16951573 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/951573
Eliminating interconnect strains in microcircuits Nov 17, 2020 Issued
Array ( [id] => 19672755 [patent_doc_number] => 12185551 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-31 [patent_title] => Methods for forming ferroelectric memory devices [patent_app_type] => utility [patent_app_number] => 17/074518 [patent_app_country] => US [patent_app_date] => 2020-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 9844 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 324 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17074518 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/074518
Methods for forming ferroelectric memory devices Oct 18, 2020 Issued
Array ( [id] => 16586361 [patent_doc_number] => 20210020763 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-21 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/065235 [patent_app_country] => US [patent_app_date] => 2020-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5067 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17065235 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/065235
Semiconductor device Oct 6, 2020 Issued
Array ( [id] => 16873600 [patent_doc_number] => 20210167067 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-03 [patent_title] => MEMORY DEVICE AND SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/061920 [patent_app_country] => US [patent_app_date] => 2020-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 27738 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17061920 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/061920
Memory device and semiconductor device Oct 1, 2020 Issued
Array ( [id] => 16560409 [patent_doc_number] => 20210005558 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-07 [patent_title] => METHOD FOR FORMING HYBRID-BONDING STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/030927 [patent_app_country] => US [patent_app_date] => 2020-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7522 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17030927 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/030927
Method for forming hybrid-bonding structure Sep 23, 2020 Issued
Array ( [id] => 16560450 [patent_doc_number] => 20210005599 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-07 [patent_title] => INTERNALLY STACKED NPN WITH SEGMENTED COLLECTOR [patent_app_type] => utility [patent_app_number] => 17/028001 [patent_app_country] => US [patent_app_date] => 2020-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5813 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17028001 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/028001
INTERNALLY STACKED NPN WITH SEGMENTED COLLECTOR Sep 21, 2020 Pending
Array ( [id] => 16560450 [patent_doc_number] => 20210005599 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-07 [patent_title] => INTERNALLY STACKED NPN WITH SEGMENTED COLLECTOR [patent_app_type] => utility [patent_app_number] => 17/028001 [patent_app_country] => US [patent_app_date] => 2020-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5813 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17028001 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/028001
INTERNALLY STACKED NPN WITH SEGMENTED COLLECTOR Sep 21, 2020 Pending
Array ( [id] => 16560569 [patent_doc_number] => 20210005718 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-07 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/027712 [patent_app_country] => US [patent_app_date] => 2020-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6454 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17027712 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/027712
Semiconductor device Sep 21, 2020 Issued
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