
Melanie Sue Pellegrini
Examiner (ID: 13920, Phone: (571)272-6028 , Office: P/2911 )
| Most Active Art Unit | 2911 |
| Art Unit(s) | 2914, 2916, 2911 |
| Total Applications | 3599 |
| Issued Applications | 3477 |
| Pending Applications | 11 |
| Abandoned Applications | 120 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 16764720
[patent_doc_number] => 20210110302
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-04-15
[patent_title] => RESOURCE-AWARE AUTOMATIC MACHINE LEARNING SYSTEM
[patent_app_type] => utility
[patent_app_number] => 16/749717
[patent_app_country] => US
[patent_app_date] => 2020-01-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7789
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 226
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16749717
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/749717 | Resource-aware automatic machine learning system | Jan 21, 2020 | Issued |
Array
(
[id] => 18189795
[patent_doc_number] => 11580386
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-02-14
[patent_title] => Convolutional layer acceleration unit, embedded system having the same, and method for operating the embedded system
[patent_app_type] => utility
[patent_app_number] => 16/729135
[patent_app_country] => US
[patent_app_date] => 2019-12-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 9650
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 165
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16729135
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/729135 | Convolutional layer acceleration unit, embedded system having the same, and method for operating the embedded system | Dec 26, 2019 | Issued |
Array
(
[id] => 15836773
[patent_doc_number] => 20200133669
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-04-30
[patent_title] => TECHNIQUES FOR DYNAMIC PROXIMITY BASED ON-DIE TERMINATION
[patent_app_type] => utility
[patent_app_number] => 16/725521
[patent_app_country] => US
[patent_app_date] => 2019-12-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12399
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16725521
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/725521 | TECHNIQUES FOR DYNAMIC PROXIMITY BASED ON-DIE TERMINATION | Dec 22, 2019 | Abandoned |
Array
(
[id] => 16903149
[patent_doc_number] => 20210182065
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-06-17
[patent_title] => APPARATUSES AND METHODS FOR IN-LINE NO OPERATION REPEAT COMMANDS
[patent_app_type] => utility
[patent_app_number] => 16/715416
[patent_app_country] => US
[patent_app_date] => 2019-12-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11776
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -22
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16715416
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/715416 | APPARATUSES AND METHODS FOR IN-LINE NO OPERATION REPEAT COMMANDS | Dec 15, 2019 | Abandoned |
Array
(
[id] => 18316585
[patent_doc_number] => 11630666
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-04-18
[patent_title] => Computing device and method
[patent_app_type] => utility
[patent_app_number] => 16/714875
[patent_app_country] => US
[patent_app_date] => 2019-12-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 23
[patent_no_of_words] => 27737
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 209
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16714875
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/714875 | Computing device and method | Dec 15, 2019 | Issued |
Array
(
[id] => 16887587
[patent_doc_number] => 20210173784
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-06-10
[patent_title] => MEMORY CONTROL METHOD AND SYSTEM
[patent_app_type] => utility
[patent_app_number] => 16/706427
[patent_app_country] => US
[patent_app_date] => 2019-12-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14945
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -24
[patent_words_short_claim] => 66
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16706427
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/706427 | MEMORY CONTROL METHOD AND SYSTEM | Dec 5, 2019 | Abandoned |
Array
(
[id] => 18750667
[patent_doc_number] => 11809981
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2023-11-07
[patent_title] => Performing hardware operator fusion
[patent_app_type] => utility
[patent_app_number] => 16/698753
[patent_app_country] => US
[patent_app_date] => 2019-11-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 17332
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 266
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16698753
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/698753 | Performing hardware operator fusion | Nov 26, 2019 | Issued |
Array
(
[id] => 18087727
[patent_doc_number] => 11537864
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-12-27
[patent_title] => Reduction mode of planar engine in neural processor
[patent_app_type] => utility
[patent_app_number] => 16/695782
[patent_app_country] => US
[patent_app_date] => 2019-11-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 11
[patent_no_of_words] => 14149
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 156
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16695782
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/695782 | Reduction mode of planar engine in neural processor | Nov 25, 2019 | Issued |
Array
(
[id] => 16758491
[patent_doc_number] => 10977039
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-04-13
[patent_title] => Apparatus and method for performing dual signed and unsigned multiplication of packed data elements
[patent_app_type] => utility
[patent_app_number] => 16/672203
[patent_app_country] => US
[patent_app_date] => 2019-11-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 28
[patent_no_of_words] => 16180
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 167
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16672203
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/672203 | Apparatus and method for performing dual signed and unsigned multiplication of packed data elements | Oct 31, 2019 | Issued |
Array
(
[id] => 15837233
[patent_doc_number] => 20200133899
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-04-30
[patent_title] => LOAD REDUCED NONVOLATILE MEMORY INTERFACE
[patent_app_type] => utility
[patent_app_number] => 16/664535
[patent_app_country] => US
[patent_app_date] => 2019-10-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14954
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16664535
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/664535 | Load reduced nonvolatile memory interface | Oct 24, 2019 | Issued |
Array
(
[id] => 16795181
[patent_doc_number] => 20210124998
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-04-29
[patent_title] => CLASSIFICATION USING CASCADED SPATIAL VOTING GRIDS
[patent_app_type] => utility
[patent_app_number] => 16/664408
[patent_app_country] => US
[patent_app_date] => 2019-10-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 21608
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16664408
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/664408 | Classification using cascaded spatial voting grids | Oct 24, 2019 | Issued |
Array
(
[id] => 19732405
[patent_doc_number] => 12210401
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-01-28
[patent_title] => Temperature based optimization of data storage operations
[patent_app_type] => utility
[patent_app_number] => 16/562197
[patent_app_country] => US
[patent_app_date] => 2019-09-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 21
[patent_no_of_words] => 18439
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 268
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16562197
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/562197 | Temperature based optimization of data storage operations | Sep 4, 2019 | Issued |
Array
(
[id] => 15213957
[patent_doc_number] => 20190369665
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-12-05
[patent_title] => LOCATION-BASED POWER SAVING SOLUTION FOR WIRELESS DOCKING PRODUCTS
[patent_app_type] => utility
[patent_app_number] => 16/459903
[patent_app_country] => US
[patent_app_date] => 2019-07-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5409
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -6
[patent_words_short_claim] => 175
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16459903
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/459903 | Location-based power saving solution for wireless docking products | Jul 1, 2019 | Issued |
Array
(
[id] => 15328755
[patent_doc_number] => 20200004707
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-01-02
[patent_title] => CHIP CARD SOCKET COMMUNICATION
[patent_app_type] => utility
[patent_app_number] => 16/457345
[patent_app_country] => US
[patent_app_date] => 2019-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10184
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16457345
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/457345 | Chip card socket communication | Jun 27, 2019 | Issued |
Array
(
[id] => 16515846
[patent_doc_number] => 20200395104
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-12-17
[patent_title] => GATEWAY CONFORMANCE VALIDATION
[patent_app_type] => utility
[patent_app_number] => 16/443677
[patent_app_country] => US
[patent_app_date] => 2019-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12926
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16443677
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/443677 | Gateway conformance validation | Jun 16, 2019 | Issued |
Array
(
[id] => 18015125
[patent_doc_number] => 11507421
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-11-22
[patent_title] => Information handling system and method to allocate peripheral component interconnect express (PCIe) bus resources
[patent_app_type] => utility
[patent_app_number] => 16/438062
[patent_app_country] => US
[patent_app_date] => 2019-06-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 11251
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 175
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16438062
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/438062 | Information handling system and method to allocate peripheral component interconnect express (PCIe) bus resources | Jun 10, 2019 | Issued |
Array
(
[id] => 14811163
[patent_doc_number] => 20190272191
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-09-05
[patent_title] => VIRTUAL MACHINE MONITOR TO I/O STACK CONDUIT IN VIRTUAL REAL MEMORY
[patent_app_type] => utility
[patent_app_number] => 16/416422
[patent_app_country] => US
[patent_app_date] => 2019-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4161
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 169
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16416422
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/416422 | Virtual machine monitor to I/O stack conduit in virtual real memory | May 19, 2019 | Issued |
Array
(
[id] => 17238436
[patent_doc_number] => 11182316
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-11-23
[patent_title] => Program interrupt code conversion
[patent_app_type] => utility
[patent_app_number] => 16/416381
[patent_app_country] => US
[patent_app_date] => 2019-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 5462
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 179
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16416381
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/416381 | Program interrupt code conversion | May 19, 2019 | Issued |
Array
(
[id] => 15152049
[patent_doc_number] => 20190354502
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-11-21
[patent_title] => LIGHTWEIGHT UNIVERSAL SERIAL BUS (USB) COMPOUND DEVICE IMPLEMENTATION
[patent_app_type] => utility
[patent_app_number] => 16/409030
[patent_app_country] => US
[patent_app_date] => 2019-05-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4446
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16409030
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/409030 | LIGHTWEIGHT UNIVERSAL SERIAL BUS (USB) COMPOUND DEVICE IMPLEMENTATION | May 9, 2019 | Abandoned |
Array
(
[id] => 16423896
[patent_doc_number] => 20200349094
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-11-05
[patent_title] => HOST DEVICE WITH MULTI-PATH LAYER CONFIGURED FOR DETECTION AND RESOLUTION OF INITIATOR-RELATED CONDITIONS
[patent_app_type] => utility
[patent_app_number] => 16/401280
[patent_app_country] => US
[patent_app_date] => 2019-05-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10776
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 143
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16401280
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/401280 | Host device with multi-path layer configured for detection and resolution of initiator-related conditions | May 1, 2019 | Issued |