Search

Melanie Sue Pellegrini

Examiner (ID: 13920, Phone: (571)272-6028 , Office: P/2911 )

Most Active Art Unit
2911
Art Unit(s)
2914, 2916, 2911
Total Applications
3599
Issued Applications
3477
Pending Applications
11
Abandoned Applications
120

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9787630 [patent_doc_number] => 20140304450 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-09 [patent_title] => 'SWITCHING DEVICE, PACKET CONTROL METHOD, AND DATA COMMUNICATION SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/226888 [patent_app_country] => US [patent_app_date] => 2014-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 12469 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14226888 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/226888
SWITCHING DEVICE, PACKET CONTROL METHOD, AND DATA COMMUNICATION SYSTEM Mar 26, 2014 Abandoned
Array ( [id] => 10393124 [patent_doc_number] => 20150278131 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-01 [patent_title] => 'DIRECT MEMORY ACCESS CONTROLLER WITH GENERAL PURPOSE INPUTS AND OUTPUTS' [patent_app_type] => utility [patent_app_number] => 14/225928 [patent_app_country] => US [patent_app_date] => 2014-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 12671 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14225928 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/225928
DIRECT MEMORY ACCESS CONTROLLER WITH GENERAL PURPOSE INPUTS AND OUTPUTS Mar 25, 2014 Abandoned
Array ( [id] => 14395439 [patent_doc_number] => 10311003 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-04 [patent_title] => Detection and identifcation of supported connection protocols in a multi-purpose storage bay [patent_app_type] => utility [patent_app_number] => 14/226441 [patent_app_country] => US [patent_app_date] => 2014-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3761 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14226441 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/226441
Detection and identifcation of supported connection protocols in a multi-purpose storage bay Mar 25, 2014 Issued
Array ( [id] => 9746888 [patent_doc_number] => 20140282607 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'SYSTEM MANAGEMENT AND INSTRUCTION COUNTING' [patent_app_type] => utility [patent_app_number] => 14/224269 [patent_app_country] => US [patent_app_date] => 2014-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9142 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14224269 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/224269
System management and instruction counting Mar 24, 2014 Issued
Array ( [id] => 10392971 [patent_doc_number] => 20150277978 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-01 [patent_title] => 'NETWORK PROCESSOR FOR MANAGING A PACKET PROCESSING ACCELERATION LOGIC CIRCUITRY IN A NETWORKING DEVICE' [patent_app_type] => utility [patent_app_number] => 14/224391 [patent_app_country] => US [patent_app_date] => 2014-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5133 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14224391 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/224391
NETWORK PROCESSOR FOR MANAGING A PACKET PROCESSING ACCELERATION LOGIC CIRCUITRY IN A NETWORKING DEVICE Mar 24, 2014 Abandoned
Array ( [id] => 9758744 [patent_doc_number] => 20140289445 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-25 [patent_title] => 'HARDWARE ACCELERATOR SYSTEM AND METHOD' [patent_app_type] => utility [patent_app_number] => 14/223363 [patent_app_country] => US [patent_app_date] => 2014-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10294 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14223363 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/223363
HARDWARE ACCELERATOR SYSTEM AND METHOD Mar 23, 2014 Abandoned
Array ( [id] => 10027551 [patent_doc_number] => 09069450 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-30 [patent_title] => 'Multi-modal/multi-channel application tool architecture' [patent_app_type] => utility [patent_app_number] => 14/196212 [patent_app_country] => US [patent_app_date] => 2014-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9360 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14196212 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/196212
Multi-modal/multi-channel application tool architecture Mar 3, 2014 Issued
Array ( [id] => 11801467 [patent_doc_number] => 09542344 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-10 [patent_title] => 'Datapath management in a memory controller' [patent_app_type] => utility [patent_app_number] => 14/184208 [patent_app_country] => US [patent_app_date] => 2014-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 19 [patent_no_of_words] => 9687 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14184208 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/184208
Datapath management in a memory controller Feb 18, 2014 Issued
Array ( [id] => 11452146 [patent_doc_number] => 09575791 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-21 [patent_title] => 'Unified extensible firmware interface system management mode initialization protections with system management interrupt transfer monitor sandboxing' [patent_app_type] => utility [patent_app_number] => 14/178729 [patent_app_country] => US [patent_app_date] => 2014-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3702 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14178729 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/178729
Unified extensible firmware interface system management mode initialization protections with system management interrupt transfer monitor sandboxing Feb 11, 2014 Issued
Array ( [id] => 11279529 [patent_doc_number] => 09496010 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-15 [patent_title] => 'Semiconductor device and memory system including the same' [patent_app_type] => utility [patent_app_number] => 14/176218 [patent_app_country] => US [patent_app_date] => 2014-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3984 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14176218 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/176218
Semiconductor device and memory system including the same Feb 9, 2014 Issued
Array ( [id] => 9451936 [patent_doc_number] => 20140123106 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-01 [patent_title] => 'COMPOUND VERSIONING AND IDENTIFICATION SCHEME FOR COMPOSITE APPLICATION DEVELOPMENT' [patent_app_type] => utility [patent_app_number] => 14/149032 [patent_app_country] => US [patent_app_date] => 2014-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7683 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14149032 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/149032
Compound versioning and identification scheme for composite application development Jan 6, 2014 Issued
Array ( [id] => 10301142 [patent_doc_number] => 20150186141 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-02 [patent_title] => 'VERSATILE PACKED DATA COMPARISON PROCESSORS, METHODS, SYSTEMS, AND INSTRUCTIONS' [patent_app_type] => utility [patent_app_number] => 14/142849 [patent_app_country] => US [patent_app_date] => 2013-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 28233 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14142849 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/142849
Versatile packed data comparison processors, methods, systems, and instructions Dec 28, 2013 Issued
Array ( [id] => 10301140 [patent_doc_number] => 20150186139 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-02 [patent_title] => 'SM3 HASH FUNCTION MESSAGE EXPANSION PROCESSORS, METHODS, SYSTEMS, AND INSTRUCTIONS' [patent_app_type] => utility [patent_app_number] => 14/142745 [patent_app_country] => US [patent_app_date] => 2013-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 22143 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14142745 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/142745
SM3 hash function message expansion processors, methods, systems, and instructions Dec 26, 2013 Issued
Array ( [id] => 10301136 [patent_doc_number] => 20150186136 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-02 [patent_title] => 'SYSTEMS, APPARATUSES, AND METHODS FOR EXPAND AND COMPRESS' [patent_app_type] => utility [patent_app_number] => 14/142416 [patent_app_country] => US [patent_app_date] => 2013-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 11712 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14142416 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/142416
SYSTEMS, APPARATUSES, AND METHODS FOR EXPAND AND COMPRESS Dec 26, 2013 Abandoned
Array ( [id] => 12194567 [patent_doc_number] => 09898298 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-02-20 [patent_title] => 'Context save and restore' [patent_app_type] => utility [patent_app_number] => 14/139798 [patent_app_country] => US [patent_app_date] => 2013-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 8625 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14139798 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/139798
Context save and restore Dec 22, 2013 Issued
Array ( [id] => 10293091 [patent_doc_number] => 20150178090 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-25 [patent_title] => 'Instruction and Logic for Memory Disambiguation in an Out-of-Order Processor' [patent_app_type] => utility [patent_app_number] => 14/139171 [patent_app_country] => US [patent_app_date] => 2013-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 25486 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14139171 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/139171
Instruction and logic for memory disambiguation in an out-of-order processor Dec 22, 2013 Issued
Array ( [id] => 11390963 [patent_doc_number] => 09552208 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-24 [patent_title] => 'System, method, and computer program product for remapping registers based on a change in execution mode' [patent_app_type] => utility [patent_app_number] => 14/137842 [patent_app_country] => US [patent_app_date] => 2013-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 5376 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14137842 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/137842
System, method, and computer program product for remapping registers based on a change in execution mode Dec 19, 2013 Issued
Array ( [id] => 10293093 [patent_doc_number] => 20150178092 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-25 [patent_title] => 'HIERARCHICAL AND PARALLEL PARTITION NETWORKS' [patent_app_type] => utility [patent_app_number] => 14/137108 [patent_app_country] => US [patent_app_date] => 2013-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 18801 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14137108 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/137108
HIERARCHICAL AND PARALLEL PARTITION NETWORKS Dec 19, 2013 Abandoned
Array ( [id] => 9563757 [patent_doc_number] => 20140181471 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-26 [patent_title] => 'Adaptive Data Collection Practices in a Multi-Processor Device' [patent_app_type] => utility [patent_app_number] => 14/137288 [patent_app_country] => US [patent_app_date] => 2013-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8534 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14137288 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/137288
Adaptive data collection practices in a multi-processor device Dec 19, 2013 Issued
Array ( [id] => 11278838 [patent_doc_number] => 09495317 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-15 [patent_title] => 'Bus driver circuit with improved transition speed' [patent_app_type] => utility [patent_app_number] => 14/132831 [patent_app_country] => US [patent_app_date] => 2013-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 8842 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14132831 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/132831
Bus driver circuit with improved transition speed Dec 17, 2013 Issued
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