Search

Melanie Sue Pellegrini

Examiner (ID: 13920, Phone: (571)272-6028 , Office: P/2911 )

Most Active Art Unit
2911
Art Unit(s)
2914, 2916, 2911
Total Applications
3599
Issued Applications
3477
Pending Applications
11
Abandoned Applications
120

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11806543 [patent_doc_number] => 09547612 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-17 [patent_title] => 'Method and architecture for data channel virtualization in an embedded system' [patent_app_type] => utility [patent_app_number] => 13/888399 [patent_app_country] => US [patent_app_date] => 2013-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4874 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 357 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13888399 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/888399
Method and architecture for data channel virtualization in an embedded system May 6, 2013 Issued
Array ( [id] => 10258010 [patent_doc_number] => 20150143007 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-05-21 [patent_title] => 'CONTROL CIRCUITRY MODULE GROUP, ELECTRIC DEVICE AND MODEM DEVICE' [patent_app_type] => utility [patent_app_number] => 14/391703 [patent_app_country] => US [patent_app_date] => 2013-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6081 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14391703 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/391703
Control circuitry module group, electric device and modem device Apr 7, 2013 Issued
Array ( [id] => 11791030 [patent_doc_number] => 09400655 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-07-26 [patent_title] => 'Technique for freeing renamed registers' [patent_app_type] => utility [patent_app_number] => 13/847892 [patent_app_country] => US [patent_app_date] => 2013-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8979 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13847892 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/847892
Technique for freeing renamed registers Mar 19, 2013 Issued
Array ( [id] => 9745679 [patent_doc_number] => 20140281398 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'INSTRUCTION EMULATION PROCESSORS, METHODS, AND SYSTEMS' [patent_app_type] => utility [patent_app_number] => 13/844873 [patent_app_country] => US [patent_app_date] => 2013-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 20518 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13844873 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/844873
INSTRUCTION EMULATION PROCESSORS, METHODS, AND SYSTEMS Mar 15, 2013 Abandoned
Array ( [id] => 9745687 [patent_doc_number] => 20140281406 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'Instruction For Performing An Overload Check' [patent_app_type] => utility [patent_app_number] => 13/843558 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4425 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13843558 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/843558
Instruction for performing an overload check Mar 14, 2013 Issued
Array ( [id] => 9745682 [patent_doc_number] => 20140281401 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'Systems, Apparatuses, and Methods for Determining a Trailing Least Significant Masking Bit of a Writemask Register' [patent_app_type] => utility [patent_app_number] => 13/840809 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 10301 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13840809 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/840809
Systems, apparatuses, and methods for determining a trailing least significant masking bit of a writemask register Mar 14, 2013 Issued
Array ( [id] => 11299527 [patent_doc_number] => 09507535 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-29 [patent_title] => 'Offloading raid update operations to disk controllers' [patent_app_type] => utility [patent_app_number] => 14/236230 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3919 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14236230 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/236230
Offloading raid update operations to disk controllers Mar 14, 2013 Issued
Array ( [id] => 11179600 [patent_doc_number] => 09411593 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-09 [patent_title] => 'Processors, methods, systems, and instructions to consolidate unmasked elements of operation masks' [patent_app_type] => utility [patent_app_number] => 13/842730 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 26 [patent_no_of_words] => 18375 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13842730 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/842730
Processors, methods, systems, and instructions to consolidate unmasked elements of operation masks Mar 14, 2013 Issued
Array ( [id] => 10630582 [patent_doc_number] => 09348732 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-24 [patent_title] => 'Microstackshots' [patent_app_type] => utility [patent_app_number] => 13/842938 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6919 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13842938 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/842938
Microstackshots Mar 14, 2013 Issued
Array ( [id] => 9745723 [patent_doc_number] => 20140281442 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'SYSTEM MANAGEMENT AND INSTRUCTION COUNTING' [patent_app_type] => utility [patent_app_number] => 13/844189 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9103 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13844189 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/844189
System management and instruction counting Mar 14, 2013 Issued
Array ( [id] => 9745696 [patent_doc_number] => 20140281415 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'DYNAMIC RENAME BASED REGISTER RECONFIGURATION OF A VECTOR REGISTER FILE' [patent_app_type] => utility [patent_app_number] => 13/837213 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5280 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13837213 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/837213
Dynamic rename based register reconfiguration of a vector register file Mar 14, 2013 Issued
Array ( [id] => 12167508 [patent_doc_number] => 09886277 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-02-06 [patent_title] => 'Methods and apparatus for fusing instructions to provide OR-test and AND-test functionality on multiple test sources' [patent_app_type] => utility [patent_app_number] => 13/842754 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 32 [patent_no_of_words] => 18989 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13842754 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/842754
Methods and apparatus for fusing instructions to provide OR-test and AND-test functionality on multiple test sources Mar 14, 2013 Issued
Array ( [id] => 9814434 [patent_doc_number] => 20150026379 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-22 [patent_title] => 'GENERIC METHOD TO BUILD VIRTUAL PCI DEVICE AND VIRTUAL MMIO DEVICE' [patent_app_type] => utility [patent_app_number] => 14/126865 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 12734 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14126865 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/126865
GENERIC METHOD TO BUILD VIRTUAL PCI DEVICE AND VIRTUAL MMIO DEVICE Mar 13, 2013 Abandoned
Array ( [id] => 9017321 [patent_doc_number] => 20130232285 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-05 [patent_title] => 'CONTROL METHOD OF FLOW CONTROL SCHEME AND CONTROL MODULE THEREOF' [patent_app_type] => utility [patent_app_number] => 13/778129 [patent_app_country] => US [patent_app_date] => 2013-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3456 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13778129 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/778129
CONTROL METHOD OF FLOW CONTROL SCHEME AND CONTROL MODULE THEREOF Feb 26, 2013 Abandoned
Array ( [id] => 9683261 [patent_doc_number] => 20140240024 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-28 [patent_title] => 'Method and Apparatus for Predictive Switching' [patent_app_type] => utility [patent_app_number] => 13/779709 [patent_app_country] => US [patent_app_date] => 2013-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3832 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13779709 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/779709
Method and Apparatus for Predictive Switching Feb 26, 2013 Abandoned
Array ( [id] => 9852883 [patent_doc_number] => 08954630 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-10 [patent_title] => 'Information processing apparatus, information processing method, and program' [patent_app_type] => utility [patent_app_number] => 13/779171 [patent_app_country] => US [patent_app_date] => 2013-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 12213 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13779171 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/779171
Information processing apparatus, information processing method, and program Feb 26, 2013 Issued
Array ( [id] => 9998880 [patent_doc_number] => 09043496 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-05-26 [patent_title] => 'Bridge circuit' [patent_app_type] => utility [patent_app_number] => 13/779736 [patent_app_country] => US [patent_app_date] => 2013-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5549 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13779736 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/779736
Bridge circuit Feb 26, 2013 Issued
Array ( [id] => 9372553 [patent_doc_number] => 20140082426 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-20 [patent_title] => 'DETECTION CIRCUIT FOR FLEXIBLE PRINTED CIRCUIT CONNECTION INTEGRITY' [patent_app_type] => utility [patent_app_number] => 13/778589 [patent_app_country] => US [patent_app_date] => 2013-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4791 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13778589 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/778589
DETECTION CIRCUIT FOR FLEXIBLE PRINTED CIRCUIT CONNECTION INTEGRITY Feb 26, 2013 Abandoned
Array ( [id] => 9688101 [patent_doc_number] => 20140244866 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-28 [patent_title] => 'BANDWIDTH AWARE REQUEST THROTTLING' [patent_app_type] => utility [patent_app_number] => 13/777564 [patent_app_country] => US [patent_app_date] => 2013-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9523 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13777564 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/777564
Bandwidth aware request throttling Feb 25, 2013 Issued
Array ( [id] => 8816437 [patent_doc_number] => 20130117481 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-09 [patent_title] => 'FIBRE CHANNEL N-PORT ID VIRTUALIZATION PROTOCOL' [patent_app_type] => utility [patent_app_number] => 13/724394 [patent_app_country] => US [patent_app_date] => 2012-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 20426 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13724394 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/724394
Fibre channel N-port ID virtualization protocol Dec 20, 2012 Issued
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