Search

Melanie Sue Pellegrini

Examiner (ID: 13920, Phone: (571)272-6028 , Office: P/2911 )

Most Active Art Unit
2911
Art Unit(s)
2914, 2916, 2911
Total Applications
3599
Issued Applications
3477
Pending Applications
11
Abandoned Applications
120

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9398428 [patent_doc_number] => 20140095834 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-04-03 [patent_title] => 'INSTRUCTION AND LOGIC FOR BOYER-MOORE SEARCH OF TEXT STRINGS' [patent_app_type] => utility [patent_app_number] => 13/632075 [patent_app_country] => US [patent_app_date] => 2012-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 20336 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13632075 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/632075
Instruction and logic for boyer-moore search of text strings Sep 29, 2012 Issued
Array ( [id] => 9398422 [patent_doc_number] => 20140095828 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-04-03 [patent_title] => 'VECTOR MOVE INSTRUCTION CONTROLLED BY READ AND WRITE MASKS' [patent_app_type] => utility [patent_app_number] => 13/630118 [patent_app_country] => US [patent_app_date] => 2012-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 11157 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13630118 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/630118
Vector move instruction controlled by read and write masks Sep 27, 2012 Issued
Array ( [id] => 9398436 [patent_doc_number] => 20140095842 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-04-03 [patent_title] => 'ACCELERATED INTERLANE VECTOR REDUCTION INSTRUCTIONS' [patent_app_type] => utility [patent_app_number] => 13/630154 [patent_app_country] => US [patent_app_date] => 2012-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 9781 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13630154 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/630154
Accelerated interlane vector reduction instructions Sep 27, 2012 Issued
Array ( [id] => 9398441 [patent_doc_number] => 20140095847 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-04-03 [patent_title] => 'INSTRUCTION AND HIGHLY EFFICIENT MICRO-ARCHITECTURE TO ENABLE INSTANT CONTEXT SWITCH FOR USER-LEVEL THREADING' [patent_app_type] => utility [patent_app_number] => 13/630124 [patent_app_country] => US [patent_app_date] => 2012-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 10038 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13630124 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/630124
INSTRUCTION AND HIGHLY EFFICIENT MICRO-ARCHITECTURE TO ENABLE INSTANT CONTEXT SWITCH FOR USER-LEVEL THREADING Sep 27, 2012 Abandoned
Array ( [id] => 11538425 [patent_doc_number] => 09612834 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-04-04 [patent_title] => 'Processor with variable instruction atomicity' [patent_app_type] => utility [patent_app_number] => 13/628366 [patent_app_country] => US [patent_app_date] => 2012-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 4817 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13628366 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/628366
Processor with variable instruction atomicity Sep 26, 2012 Issued
Array ( [id] => 9386161 [patent_doc_number] => 20140089644 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-27 [patent_title] => 'CIRCUIT AND METHOD FOR IDENTIFYING EXCEPTION CASES IN A FLOATING-POINT UNIT AND GRAPHICS PROCESSING UNIT EMPLOYING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/626104 [patent_app_country] => US [patent_app_date] => 2012-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3058 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13626104 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/626104
Circuit and method for identifying exception cases in a floating-point unit and graphics processing unit employing the same Sep 24, 2012 Issued
Array ( [id] => 10623416 [patent_doc_number] => 09342358 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-17 [patent_title] => 'System and method for synchronizing processor instruction execution' [patent_app_type] => utility [patent_app_number] => 13/620047 [patent_app_country] => US [patent_app_date] => 2012-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 8764 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13620047 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/620047
System and method for synchronizing processor instruction execution Sep 13, 2012 Issued
Array ( [id] => 9314838 [patent_doc_number] => 08656073 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-02-18 [patent_title] => 'Methods of multi-server application synchronization without stopping I/O' [patent_app_type] => utility [patent_app_number] => 13/615305 [patent_app_country] => US [patent_app_date] => 2012-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 6787 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13615305 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/615305
Methods of multi-server application synchronization without stopping I/O Sep 12, 2012 Issued
Array ( [id] => 8568611 [patent_doc_number] => 20120331182 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-27 [patent_title] => 'Software Settings Based on Geophysical Location' [patent_app_type] => utility [patent_app_number] => 13/603687 [patent_app_country] => US [patent_app_date] => 2012-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5325 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13603687 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/603687
Software Settings Based on Geophysical Location Sep 4, 2012 Abandoned
Array ( [id] => 9163476 [patent_doc_number] => 20130311753 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-21 [patent_title] => 'METHOD AND DEVICE (UNIVERSAL MULTIFUNCTION ACCELERATOR) FOR ACCELERATING COMPUTATIONS BY PARALLEL COMPUTATIONS OF MIDDLE STRATUM OPERATIONS' [patent_app_type] => utility [patent_app_number] => 13/596269 [patent_app_country] => US [patent_app_date] => 2012-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5379 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13596269 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/596269
METHOD AND DEVICE (UNIVERSAL MULTIFUNCTION ACCELERATOR) FOR ACCELERATING COMPUTATIONS BY PARALLEL COMPUTATIONS OF MIDDLE STRATUM OPERATIONS Aug 27, 2012 Abandoned
Array ( [id] => 10111350 [patent_doc_number] => 09146762 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-29 [patent_title] => 'Specialized virtual machine to virtualize hardware resource for guest virtual machines' [patent_app_type] => utility [patent_app_number] => 13/592891 [patent_app_country] => US [patent_app_date] => 2012-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3563 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13592891 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/592891
Specialized virtual machine to virtualize hardware resource for guest virtual machines Aug 22, 2012 Issued
Array ( [id] => 11207000 [patent_doc_number] => 09436627 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-09-06 [patent_title] => 'Detection of abnormal operation caused by interrupt processing' [patent_app_type] => utility [patent_app_number] => 14/239832 [patent_app_country] => US [patent_app_date] => 2012-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3714 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14239832 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/239832
Detection of abnormal operation caused by interrupt processing Jul 24, 2012 Issued
Array ( [id] => 10078894 [patent_doc_number] => 09116742 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-08-25 [patent_title] => 'Systems and methods for reducing interrupt latency' [patent_app_type] => utility [patent_app_number] => 13/550755 [patent_app_country] => US [patent_app_date] => 2012-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3564 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13550755 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/550755
Systems and methods for reducing interrupt latency Jul 16, 2012 Issued
Array ( [id] => 8929784 [patent_doc_number] => 20130185544 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-18 [patent_title] => 'PROCESSOR WITH INSTRUCTION VARIABLE DATA DISTRIBUTION' [patent_app_type] => utility [patent_app_number] => 13/548933 [patent_app_country] => US [patent_app_date] => 2012-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10892 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13548933 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/548933
Processor with instruction variable data distribution Jul 12, 2012 Issued
Array ( [id] => 8604552 [patent_doc_number] => 20130009864 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-10 [patent_title] => 'METHOD AND APPARATUS FOR INTERFACING BETWEEN EXTERNAL DEVICE AND MOBILE DEVICE' [patent_app_type] => utility [patent_app_number] => 13/540786 [patent_app_country] => US [patent_app_date] => 2012-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6495 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13540786 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/540786
METHOD AND APPARATUS FOR INTERFACING BETWEEN EXTERNAL DEVICE AND MOBILE DEVICE Jul 2, 2012 Abandoned
Array ( [id] => 8965517 [patent_doc_number] => 20130205119 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-08 [patent_title] => 'INSTRUCTION AND LOGIC TO TEST TRANSACTIONAL EXECUTION STATUS' [patent_app_type] => utility [patent_app_number] => 13/538951 [patent_app_country] => US [patent_app_date] => 2012-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 14614 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13538951 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/538951
Instruction and logic to test transactional execution status Jun 28, 2012 Issued
Array ( [id] => 9722880 [patent_doc_number] => 20140258581 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-11 [patent_title] => 'Method and Device for Serial Data Transmission Having a Flexible Message Size and a Variable bit Length' [patent_app_type] => utility [patent_app_number] => 14/129581 [patent_app_country] => US [patent_app_date] => 2012-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7685 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14129581 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/129581
Method and device for serial data transmission having a flexible message size and a variable bit length Jun 25, 2012 Issued
Array ( [id] => 8432596 [patent_doc_number] => 20120254471 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-10-04 [patent_title] => 'OUTPUT SYSTEM AND METHOD FOR RESTORING LOCATION ARRANGEMENT OF OUTPUT DEVICES' [patent_app_type] => utility [patent_app_number] => 13/495217 [patent_app_country] => US [patent_app_date] => 2012-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2751 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13495217 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/495217
Output system and method for restoring location arrangement of output devices Jun 12, 2012 Issued
Array ( [id] => 8432599 [patent_doc_number] => 20120254474 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-10-04 [patent_title] => 'Milarrs Systems and Methods' [patent_app_type] => utility [patent_app_number] => 13/494452 [patent_app_country] => US [patent_app_date] => 2012-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7977 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13494452 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/494452
MILARRS systems and methods Jun 11, 2012 Issued
Array ( [id] => 10080889 [patent_doc_number] => 09118753 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-08-25 [patent_title] => 'Autonomous systems for remote control of handheld devices' [patent_app_type] => utility [patent_app_number] => 13/485090 [patent_app_country] => US [patent_app_date] => 2012-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 7142 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13485090 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/485090
Autonomous systems for remote control of handheld devices May 30, 2012 Issued
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