Melvin C. Marcelo

Array ( [id] => 9392342 [patent_doc_number] => 08688964 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-01 [patent_title] => 'Programmable exception processing latency' [patent_app_type] => utility [patent_app_number] => 12/776513 [patent_app_country] => US [patent_app_date] => 2010-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 20 [patent_no_of_words] => 8456 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12776513 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7562950 [patent_doc_number] => 20110276784 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-10 [patent_title] => 'HIERARCHICAL MULTITHREADED PROCESSING' [patent_app_type] => utility [patent_app_number] => 12/777087 [patent_app_country] => US [patent_app_date] => 2010-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5597 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0276/20110276784.pdf [firstpage_image] =>[orig_patent_app_number] => 12777087 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7562956 [patent_doc_number] => 20110276790 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-10 [patent_title] => 'INSTRUCTION SUPPORT FOR PERFORMING MONTGOMERY MULTIPLICATION' [patent_app_type] => utility [patent_app_number] => 12/776172 [patent_app_country] => US [patent_app_date] => 2010-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 30730 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0276/20110276790.pdf [firstpage_image] =>[orig_patent_app_number] => 12776172 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9289313 [patent_doc_number] => 08645669 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-02-04 [patent_title] => 'Cracking destructively overlapping operands in variable length instructions' [patent_app_type] => utility [patent_app_number] => 12/774299 [patent_app_country] => US [patent_app_date] => 2010-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 7299 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 334 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12774299 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9089367 [patent_doc_number] => 08560814 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-15 [patent_title] => 'Thread fairness on a multi-threaded processor with multi-cycle cryptographic operations' [patent_app_type] => utility [patent_app_number] => 12/773278 [patent_app_country] => US [patent_app_date] => 2010-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8632 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12773278 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7562957 [patent_doc_number] => 20110276791 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-10 [patent_title] => 'HANDLING A STORE INSTRUCTION WITH AN UNKNOWN DESTINATION ADDRESS DURING SPECULATIVE EXECUTION' [patent_app_type] => utility [patent_app_number] => 12/773661 [patent_app_country] => US [patent_app_date] => 2010-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 12297 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0276/20110276791.pdf [firstpage_image] =>[orig_patent_app_number] => 12773661 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7746839 [patent_doc_number] => 20120023308 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-26 [patent_title] => 'PARALLEL COMPARISON/SELECTION OPERATION APPARATUS, PROCESSOR, AND PARALLEL COMPARISON/SELECTION OPERATION METHOD' [patent_app_type] => utility [patent_app_number] => 13/147157 [patent_app_country] => US [patent_app_date] => 2010-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 11643 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0023/20120023308.pdf [firstpage_image] =>[orig_patent_app_number] => 13147157 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11724140 [patent_doc_number] => 09696995 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-04 [patent_title] => 'Parallel execution unit that extracts data parallelism at runtime' [patent_app_type] => utility [patent_app_number] => 12/649805 [patent_app_country] => US [patent_app_date] => 2009-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10904 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 337 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12649805 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8432710 [patent_doc_number] => 20120254585 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-10-04 [patent_title] => 'METHOD AND APPARATUS FOR FAST BRANCH-FREE VECTOR DIVISION COMPUTATION' [patent_app_type] => utility [patent_app_number] => 13/503592 [patent_app_country] => US [patent_app_date] => 2009-12-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3673 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13503592 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6087980 [patent_doc_number] => 20110145544 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-16 [patent_title] => 'MULTI-LEVEL HIERARCHICAL ROUTING MATRICES FOR PATTERN-RECOGNITION PROCESSORS' [patent_app_type] => utility [patent_app_number] => 12/638759 [patent_app_country] => US [patent_app_date] => 2009-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 10003 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0145/20110145544.pdf [firstpage_image] =>[orig_patent_app_number] => 12638759 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7503780 [patent_doc_number] => 20110264892 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-27 [patent_title] => 'DATA PROCESSING DEVICE' [patent_app_type] => utility [patent_app_number] => 12/998349 [patent_app_country] => US [patent_app_date] => 2009-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 19411 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0264/20110264892.pdf [firstpage_image] =>[orig_patent_app_number] => 12998349 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8176589 [patent_doc_number] => 20120110310 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-03 [patent_title] => 'MICROPROCESSOR WITH PIPELINE BUBBLE DETECTION DEVICE' [patent_app_type] => utility [patent_app_number] => 13/061832 [patent_app_country] => US [patent_app_date] => 2009-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3279 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0110/20120110310.pdf [firstpage_image] =>[orig_patent_app_number] => 13061832 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11465650 [patent_doc_number] => 09582281 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-28 [patent_title] => 'Data processing with variable operand size' [patent_app_type] => utility [patent_app_number] => 13/201077 [patent_app_country] => US [patent_app_date] => 2009-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3628 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 279 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13201077 [rel_patent_id] =>[rel_patent_doc_number] =>)