Search

Mewale A. Ambaye

Examiner (ID: 16677, Phone: (571)270-1076 , Office: P/2469 )

Most Active Art Unit
2469
Art Unit(s)
2469, 2416, 2472, 2475
Total Applications
1070
Issued Applications
930
Pending Applications
94
Abandoned Applications
76

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18743412 [patent_doc_number] => 20230352400 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-02 [patent_title] => INTEGRATED CIRCUIT DEVICES INCLUDING VIA STRUCTURES HAVING A NARROW UPPER PORTION, AND RELATED FABRICATION METHODS [patent_app_type] => utility [patent_app_number] => 17/880554 [patent_app_country] => US [patent_app_date] => 2022-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5529 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17880554 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/880554
Integrated circuit devices including via structures having a narrow upper portion, and related fabrication methods Aug 2, 2022 Issued
Array ( [id] => 18008563 [patent_doc_number] => 20220367330 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-17 [patent_title] => ELECTRONICS UNIT WITH INTEGRATED METALLIC PATTERN [patent_app_type] => utility [patent_app_number] => 17/878436 [patent_app_country] => US [patent_app_date] => 2022-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2782 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17878436 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/878436
Electronics unit with integrated metallic pattern Jul 31, 2022 Issued
Array ( [id] => 19399755 [patent_doc_number] => 12074143 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-27 [patent_title] => Integrated circuit package and method [patent_app_type] => utility [patent_app_number] => 17/874598 [patent_app_country] => US [patent_app_date] => 2022-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 9081 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17874598 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/874598
Integrated circuit package and method Jul 26, 2022 Issued
Array ( [id] => 18223324 [patent_doc_number] => 20230062318 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/872543 [patent_app_country] => US [patent_app_date] => 2022-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9671 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17872543 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/872543
Semiconductor device Jul 24, 2022 Issued
Array ( [id] => 19314410 [patent_doc_number] => 12040235 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-16 [patent_title] => Semiconductor device and method of manufacture [patent_app_type] => utility [patent_app_number] => 17/870343 [patent_app_country] => US [patent_app_date] => 2022-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8923 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17870343 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/870343
Semiconductor device and method of manufacture Jul 20, 2022 Issued
Array ( [id] => 17986299 [patent_doc_number] => 20220352336 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-03 [patent_title] => Transistor Gates and Method of Forming [patent_app_type] => utility [patent_app_number] => 17/869430 [patent_app_country] => US [patent_app_date] => 2022-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12672 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17869430 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/869430
Transistor gates and method of forming Jul 19, 2022 Issued
Array ( [id] => 18680061 [patent_doc_number] => 20230317719 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-05 [patent_title] => THREE-DIMENSIONAL BIPOLAR-CMOS-DMOS (BCD) STRUCTURE WITH INTEGRATED BACK-SIDE CAPACITOR [patent_app_type] => utility [patent_app_number] => 17/865967 [patent_app_country] => US [patent_app_date] => 2022-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14145 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17865967 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/865967
Three-dimensional bipolar-CMOS-DMOS (BCD) structure with integrated back-side capacitor Jul 14, 2022 Issued
Array ( [id] => 18680061 [patent_doc_number] => 20230317719 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-05 [patent_title] => THREE-DIMENSIONAL BIPOLAR-CMOS-DMOS (BCD) STRUCTURE WITH INTEGRATED BACK-SIDE CAPACITOR [patent_app_type] => utility [patent_app_number] => 17/865967 [patent_app_country] => US [patent_app_date] => 2022-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14145 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17865967 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/865967
Three-dimensional bipolar-CMOS-DMOS (BCD) structure with integrated back-side capacitor Jul 14, 2022 Issued
Array ( [id] => 17993539 [patent_doc_number] => 20220359576 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-10 [patent_title] => LIGHT EMITTING DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/865300 [patent_app_country] => US [patent_app_date] => 2022-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11779 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17865300 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/865300
Light emitting display device Jul 13, 2022 Issued
Array ( [id] => 18898683 [patent_doc_number] => 20240014168 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-11 [patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE WITH FIXING FEATURE ON WHICH BONDING WIRE IS DISPOSED [patent_app_type] => utility [patent_app_number] => 17/860392 [patent_app_country] => US [patent_app_date] => 2022-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5747 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17860392 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/860392
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE WITH FIXING FEATURE ON WHICH BONDING WIRE IS DISPOSED Jul 7, 2022 Pending
Array ( [id] => 20375325 [patent_doc_number] => 12482769 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-25 [patent_title] => Selective plating for packaged semiconductor devices [patent_app_type] => utility [patent_app_number] => 17/855695 [patent_app_country] => US [patent_app_date] => 2022-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 32 [patent_no_of_words] => 3319 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17855695 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/855695
Selective plating for packaged semiconductor devices Jun 29, 2022 Issued
Array ( [id] => 17933241 [patent_doc_number] => 20220328367 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-13 [patent_title] => METHODS OF DETECTING BONDING BETWEEN A BONDING WIRE AND A BONDING LOCATION ON A WIRE BONDING MACHINE [patent_app_type] => utility [patent_app_number] => 17/852561 [patent_app_country] => US [patent_app_date] => 2022-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4099 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17852561 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/852561
Methods of detecting bonding between a bonding wire and a bonding location on a wire bonding machine Jun 28, 2022 Issued
Array ( [id] => 18112922 [patent_doc_number] => 20230005802 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-05 [patent_title] => BUILD-UP PACKAGE FOR INTEGRATED CIRCUIT DEVICES, AND METHODS OF MAKING SAME [patent_app_type] => utility [patent_app_number] => 17/843799 [patent_app_country] => US [patent_app_date] => 2022-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2561 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17843799 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/843799
Build-up package for integrated circuit devices, and methods of making same Jun 16, 2022 Issued
Array ( [id] => 19566743 [patent_doc_number] => 12141515 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-12 [patent_title] => Memory cell layout for low current field-induced MRAM [patent_app_type] => utility [patent_app_number] => 17/842928 [patent_app_country] => US [patent_app_date] => 2022-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1664 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17842928 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/842928
Memory cell layout for low current field-induced MRAM Jun 16, 2022 Issued
Array ( [id] => 17901207 [patent_doc_number] => 20220310869 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-29 [patent_title] => OPTOELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 17/838929 [patent_app_country] => US [patent_app_date] => 2022-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4716 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17838929 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/838929
Optoelectronic device Jun 12, 2022 Issued
Array ( [id] => 17917573 [patent_doc_number] => 20220319969 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-06 [patent_title] => SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 17/838200 [patent_app_country] => US [patent_app_date] => 2022-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8376 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17838200 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/838200
Semiconductor devices and methods of manufacturing semiconductor devices Jun 10, 2022 Issued
Array ( [id] => 18456307 [patent_doc_number] => 20230197589 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/806264 [patent_app_country] => US [patent_app_date] => 2022-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6342 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17806264 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/806264
Semiconductor structure and manufacturing method thereof Jun 8, 2022 Issued
Array ( [id] => 18253513 [patent_doc_number] => 20230080552 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-16 [patent_title] => Organic Light-Emitting Diode Displays with Capillary-Flow-Inducing Structures [patent_app_type] => utility [patent_app_number] => 17/826416 [patent_app_country] => US [patent_app_date] => 2022-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7881 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17826416 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/826416
Organic light-emitting diode displays with capillary-flow-inducing structures May 26, 2022 Issued
Array ( [id] => 19796331 [patent_doc_number] => 12237301 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-25 [patent_title] => Through stack bridge bonding devices and associated methods [patent_app_type] => utility [patent_app_number] => 17/750225 [patent_app_country] => US [patent_app_date] => 2022-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 12086 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17750225 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/750225
Through stack bridge bonding devices and associated methods May 19, 2022 Issued
Array ( [id] => 19138103 [patent_doc_number] => 11973079 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-30 [patent_title] => Integration of multiple fin structures on a single substrate [patent_app_type] => utility [patent_app_number] => 17/748648 [patent_app_country] => US [patent_app_date] => 2022-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 62 [patent_no_of_words] => 17762 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17748648 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/748648
Integration of multiple fin structures on a single substrate May 18, 2022 Issued
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