Search

Michael A. Band

Examiner (ID: 11521, Phone: (571)272-9815 , Office: P/1754 )

Most Active Art Unit
1794
Art Unit(s)
1795, 1723, 1794, 1754, 1753
Total Applications
970
Issued Applications
392
Pending Applications
91
Abandoned Applications
511

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18757732 [patent_doc_number] => 20230361195 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-09 [patent_title] => SOURCE-BODY SELF-ALIGNED METHOD OF A VERTICAL DOUBLE DIFFUSED METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR [patent_app_type] => utility [patent_app_number] => 17/878443 [patent_app_country] => US [patent_app_date] => 2022-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6611 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 348 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17878443 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/878443
Source-body self-aligned method of a vertical double diffused metal oxide semiconductor field effect transistor Jul 31, 2022 Issued
Array ( [id] => 19260924 [patent_doc_number] => 12020989 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-25 [patent_title] => Structure for fringing capacitance control [patent_app_type] => utility [patent_app_number] => 17/815519 [patent_app_country] => US [patent_app_date] => 2022-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 21 [patent_no_of_words] => 6232 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17815519 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/815519
Structure for fringing capacitance control Jul 26, 2022 Issued
Array ( [id] => 19943582 [patent_doc_number] => 12315718 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-27 [patent_title] => Forming films with improved film quality [patent_app_type] => utility [patent_app_number] => 17/873597 [patent_app_country] => US [patent_app_date] => 2022-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 6271 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17873597 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/873597
Forming films with improved film quality Jul 25, 2022 Issued
Array ( [id] => 18008417 [patent_doc_number] => 20220367184 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-17 [patent_title] => METAL-ORGANIC PULSED LASER DEPOSITION FOR STOICHIOMETRIC COMPLEX OXIDE THIN FILMS [patent_app_type] => utility [patent_app_number] => 17/814565 [patent_app_country] => US [patent_app_date] => 2022-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6780 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17814565 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/814565
Metal-organic pulsed laser deposition for stoichiometric complex oxide thin films Jul 24, 2022 Issued
Array ( [id] => 18901805 [patent_doc_number] => 20240017290 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-18 [patent_title] => Methods For Stabilization Of Self-Assembled Monolayers (SAMs) Using Sequentially Pulsed Initiated Chemical Vapor Deposition (spiCVD) [patent_app_type] => utility [patent_app_number] => 17/867010 [patent_app_country] => US [patent_app_date] => 2022-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15721 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17867010 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/867010
Methods for stabilization of self-assembled monolayers (SAMs) using sequentially pulsed initiated chemical vapor deposition (spiCVD) Jul 17, 2022 Issued
Array ( [id] => 18163972 [patent_doc_number] => 20230030566 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-02 [patent_title] => SUBSTRATE PROCESSING METHOD [patent_app_type] => utility [patent_app_number] => 17/866730 [patent_app_country] => US [patent_app_date] => 2022-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7141 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17866730 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/866730
Substrate processing method Jul 17, 2022 Issued
Array ( [id] => 20161337 [patent_doc_number] => 12387972 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-12 [patent_title] => Method for manufacturing shallow trench isolation structure, shallow trench isolation structure and semiconductor structure [patent_app_type] => utility [patent_app_number] => 17/812721 [patent_app_country] => US [patent_app_date] => 2022-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 1202 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17812721 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/812721
Method for manufacturing shallow trench isolation structure, shallow trench isolation structure and semiconductor structure Jul 13, 2022 Issued
Array ( [id] => 18983706 [patent_doc_number] => 11908896 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-20 [patent_title] => Integrated circuit structure with non-gated well tap cell [patent_app_type] => utility [patent_app_number] => 17/859731 [patent_app_country] => US [patent_app_date] => 2022-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 17 [patent_no_of_words] => 6977 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17859731 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/859731
Integrated circuit structure with non-gated well tap cell Jul 6, 2022 Issued
Array ( [id] => 17985921 [patent_doc_number] => 20220351958 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-03 [patent_title] => METHOD FOR SELECTIVE DEPOSITION OF SILICON NITRIDE LAYER AND STRUCTURE INCLUDING SELECTIVELY-DEPOSITED SILICON NITRIDE LAYER [patent_app_type] => utility [patent_app_number] => 17/859929 [patent_app_country] => US [patent_app_date] => 2022-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3833 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17859929 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/859929
Method for selective deposition of silicon nitride layer and structure including selectively-deposited silicon nitride layer Jul 6, 2022 Issued
Array ( [id] => 18149963 [patent_doc_number] => 20230023820 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-26 [patent_title] => METHOD OF PROCESSING WAFER [patent_app_type] => utility [patent_app_number] => 17/809747 [patent_app_country] => US [patent_app_date] => 2022-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8262 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17809747 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/809747
Method of processing wafer Jun 28, 2022 Issued
Array ( [id] => 19972452 [patent_doc_number] => 12341073 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-24 [patent_title] => Forming method of semiconductor structure and semiconductor structure [patent_app_type] => utility [patent_app_number] => 17/808352 [patent_app_country] => US [patent_app_date] => 2022-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 3111 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17808352 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/808352
Forming method of semiconductor structure and semiconductor structure Jun 22, 2022 Issued
Array ( [id] => 20148395 [patent_doc_number] => 12382756 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-05 [patent_title] => Micro light-emitting element, micro light-emitting element array including the micro light-emitting element, and display device including the micro light-emitting element array [patent_app_type] => utility [patent_app_number] => 17/847637 [patent_app_country] => US [patent_app_date] => 2022-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 48 [patent_no_of_words] => 16952 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17847637 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/847637
Micro light-emitting element, micro light-emitting element array including the micro light-emitting element, and display device including the micro light-emitting element array Jun 22, 2022 Issued
Array ( [id] => 17913663 [patent_doc_number] => 20220316058 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-06 [patent_title] => METHOD OF PROCESSING SUBSTRATE, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SUBSTRATE PROCESSING APPARATUS AND RECORDING MEDIUM [patent_app_type] => utility [patent_app_number] => 17/843436 [patent_app_country] => US [patent_app_date] => 2022-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14551 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17843436 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/843436
Method of processing substrate, method of manufacturing semiconductor device, substrate processing apparatus and recording medium Jun 16, 2022 Issued
Array ( [id] => 18857592 [patent_doc_number] => 11855189 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-26 [patent_title] => Semiconductor device and method for forming the same [patent_app_type] => utility [patent_app_number] => 17/843373 [patent_app_country] => US [patent_app_date] => 2022-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 53 [patent_figures_cnt] => 56 [patent_no_of_words] => 8318 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17843373 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/843373
Semiconductor device and method for forming the same Jun 16, 2022 Issued
Array ( [id] => 17897472 [patent_doc_number] => 20220307134 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-29 [patent_title] => LOW-K FILMS [patent_app_type] => utility [patent_app_number] => 17/840797 [patent_app_country] => US [patent_app_date] => 2022-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6867 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17840797 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/840797
Low-k films Jun 14, 2022 Issued
Array ( [id] => 18423954 [patent_doc_number] => 20230178418 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-08 [patent_title] => MULTIGATE DEVICE STRUCTURE WITH ENGINEERED CLADDING AND METHOD MAKING THE SAME [patent_app_type] => utility [patent_app_number] => 17/805715 [patent_app_country] => US [patent_app_date] => 2022-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16050 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17805715 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/805715
Multigate device structure with engineered cladding and method making the same Jun 6, 2022 Issued
Array ( [id] => 18821338 [patent_doc_number] => 20230395679 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => Multi-Gate Devices And Method Of Forming The Same [patent_app_type] => utility [patent_app_number] => 17/832338 [patent_app_country] => US [patent_app_date] => 2022-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12353 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17832338 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/832338
Multi-gate devices and method of forming the same Jun 2, 2022 Issued
Array ( [id] => 18823048 [patent_doc_number] => 20230397389 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE WITH WORD LINES [patent_app_type] => utility [patent_app_number] => 17/831593 [patent_app_country] => US [patent_app_date] => 2022-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8251 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17831593 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/831593
Method of manufacturing semiconductor device with word lines Jun 2, 2022 Issued
Array ( [id] => 20146811 [patent_doc_number] => 12381158 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-05 [patent_title] => Wafer bonding method and bonded device structure [patent_app_type] => utility [patent_app_number] => 17/748640 [patent_app_country] => US [patent_app_date] => 2022-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 24 [patent_no_of_words] => 3343 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17748640 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/748640
Wafer bonding method and bonded device structure May 18, 2022 Issued
Array ( [id] => 19046621 [patent_doc_number] => 11935740 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-19 [patent_title] => Dual gate dielectric layers grown with an inhibitor layer [patent_app_type] => utility [patent_app_number] => 17/730944 [patent_app_country] => US [patent_app_date] => 2022-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 26 [patent_no_of_words] => 8248 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17730944 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/730944
Dual gate dielectric layers grown with an inhibitor layer Apr 26, 2022 Issued
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