| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 4089670
[patent_doc_number] => 06163063
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-12-19
[patent_title] => 'Semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 9/557502
[patent_app_country] => US
[patent_app_date] => 2000-04-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 1089
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/163/06163063.pdf
[firstpage_image] =>[orig_patent_app_number] => 557502
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/557502 | Semiconductor device | Apr 23, 2000 | Issued |
Array
(
[id] => 4364556
[patent_doc_number] => 06191460
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-02-20
[patent_title] => 'Identical gate conductivity type static random access memory cell'
[patent_app_type] => 1
[patent_app_number] => 9/390454
[patent_app_country] => US
[patent_app_date] => 1999-09-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 4576
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/191/06191460.pdf
[firstpage_image] =>[orig_patent_app_number] => 390454
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/390454 | Identical gate conductivity type static random access memory cell | Sep 6, 1999 | Issued |
Array
(
[id] => 4244011
[patent_doc_number] => 06166421
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-12-26
[patent_title] => 'Polysilicon fuse that provides an open current path when programmed without exposing the fuse to the environment'
[patent_app_type] => 1
[patent_app_number] => 9/376226
[patent_app_country] => US
[patent_app_date] => 1999-08-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 16
[patent_no_of_words] => 3523
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 233
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/166/06166421.pdf
[firstpage_image] =>[orig_patent_app_number] => 376226
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/376226 | Polysilicon fuse that provides an open current path when programmed without exposing the fuse to the environment | Aug 17, 1999 | Issued |
Array
(
[id] => 4360882
[patent_doc_number] => 06218722
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-04-17
[patent_title] => 'Antifuse based on silicided polysilicon bipolar transistor'
[patent_app_type] => 1
[patent_app_number] => 9/331575
[patent_app_country] => US
[patent_app_date] => 1999-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 11
[patent_no_of_words] => 3698
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/218/06218722.pdf
[firstpage_image] =>[orig_patent_app_number] => 331575
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/331575 | Antifuse based on silicided polysilicon bipolar transistor | Jun 28, 1999 | Issued |
| 09/117944 | SEPARABLE CONNECTING BRIDGE (FUSE) AND CONNECTABLE LINE INTERRUPTION (ANTI-FUSE) AND PROCESS FOR PRODUCING AND ACTIVATING A FUSE AND AN ANTI-FUSE | May 19, 1999 | Abandoned |
Array
(
[id] => 4355493
[patent_doc_number] => 06215169
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-04-10
[patent_title] => 'Semiconductor device with adhesive tape not overlapping an opening in the uppermost surface of the semiconductor element surface'
[patent_app_type] => 1
[patent_app_number] => 9/310725
[patent_app_country] => US
[patent_app_date] => 1999-05-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 15
[patent_no_of_words] => 3075
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 52
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/215/06215169.pdf
[firstpage_image] =>[orig_patent_app_number] => 310725
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/310725 | Semiconductor device with adhesive tape not overlapping an opening in the uppermost surface of the semiconductor element surface | May 12, 1999 | Issued |
Array
(
[id] => 4411605
[patent_doc_number] => 06172388
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-01-09
[patent_title] => 'Method of fabricating dynamic random access memories'
[patent_app_type] => 1
[patent_app_number] => 9/270027
[patent_app_country] => US
[patent_app_date] => 1999-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 12
[patent_no_of_words] => 2786
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/172/06172388.pdf
[firstpage_image] =>[orig_patent_app_number] => 270027
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/270027 | Method of fabricating dynamic random access memories | Mar 15, 1999 | Issued |
Array
(
[id] => 4152240
[patent_doc_number] => 06064110
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-05-16
[patent_title] => 'Digital circuit with transistor geometry and channel stops providing camouflage against reverse engineering'
[patent_app_type] => 1
[patent_app_number] => 9/243855
[patent_app_country] => US
[patent_app_date] => 1999-02-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 4948
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/064/06064110.pdf
[firstpage_image] =>[orig_patent_app_number] => 243855
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/243855 | Digital circuit with transistor geometry and channel stops providing camouflage against reverse engineering | Feb 2, 1999 | Issued |
Array
(
[id] => 4101536
[patent_doc_number] => 06097058
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-08-01
[patent_title] => 'Ferroelectric memory device and a method of manufacturing thereof'
[patent_app_type] => 1
[patent_app_number] => 9/235714
[patent_app_country] => US
[patent_app_date] => 1999-01-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 16
[patent_no_of_words] => 6639
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 266
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/097/06097058.pdf
[firstpage_image] =>[orig_patent_app_number] => 235714
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/235714 | Ferroelectric memory device and a method of manufacturing thereof | Jan 21, 1999 | Issued |
Array
(
[id] => 4300030
[patent_doc_number] => 06180994
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-01-30
[patent_title] => 'Array of sidewall-contacted antifuses having diffused bit lines'
[patent_app_type] => 1
[patent_app_number] => 9/234007
[patent_app_country] => US
[patent_app_date] => 1999-01-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 50
[patent_no_of_words] => 4218
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 215
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/180/06180994.pdf
[firstpage_image] =>[orig_patent_app_number] => 234007
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/234007 | Array of sidewall-contacted antifuses having diffused bit lines | Jan 18, 1999 | Issued |
Array
(
[id] => 4299811
[patent_doc_number] => 06180978
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-01-30
[patent_title] => 'Disposable gate/replacement gate MOSFETs for sub-0.1 micron gate length and ultra-shallow junctions'
[patent_app_type] => 1
[patent_app_number] => 9/216216
[patent_app_country] => US
[patent_app_date] => 1998-12-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 29
[patent_no_of_words] => 6554
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 153
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/180/06180978.pdf
[firstpage_image] =>[orig_patent_app_number] => 216216
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/216216 | Disposable gate/replacement gate MOSFETs for sub-0.1 micron gate length and ultra-shallow junctions | Dec 17, 1998 | Issued |
Array
(
[id] => 4354371
[patent_doc_number] => 06200846
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-03-13
[patent_title] => 'Semiconductor device with capacitor formed on substrate and its manufacture method'
[patent_app_type] => 1
[patent_app_number] => 9/211046
[patent_app_country] => US
[patent_app_date] => 1998-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 17
[patent_no_of_words] => 5051
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 262
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/200/06200846.pdf
[firstpage_image] =>[orig_patent_app_number] => 211046
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/211046 | Semiconductor device with capacitor formed on substrate and its manufacture method | Dec 14, 1998 | Issued |
Array
(
[id] => 4210142
[patent_doc_number] => 06078091
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-06-20
[patent_title] => 'Inter-conductive layer fuse for integrated circuits'
[patent_app_type] => 1
[patent_app_number] => 9/186307
[patent_app_country] => US
[patent_app_date] => 1998-11-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 9
[patent_no_of_words] => 3972
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/078/06078091.pdf
[firstpage_image] =>[orig_patent_app_number] => 186307
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/186307 | Inter-conductive layer fuse for integrated circuits | Nov 3, 1998 | Issued |
Array
(
[id] => 4089353
[patent_doc_number] => 06163042
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-12-19
[patent_title] => 'Semiconductor integrated circuit'
[patent_app_type] => 1
[patent_app_number] => 9/184848
[patent_app_country] => US
[patent_app_date] => 1998-11-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 1922
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 144
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/163/06163042.pdf
[firstpage_image] =>[orig_patent_app_number] => 184848
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/184848 | Semiconductor integrated circuit | Nov 2, 1998 | Issued |
Array
(
[id] => 4364253
[patent_doc_number] => 06191441
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-02-20
[patent_title] => 'Ferroelectric memory device and its drive method'
[patent_app_type] => 1
[patent_app_number] => 9/178426
[patent_app_country] => US
[patent_app_date] => 1998-10-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 60
[patent_no_of_words] => 9079
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 58
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/191/06191441.pdf
[firstpage_image] =>[orig_patent_app_number] => 178426
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/178426 | Ferroelectric memory device and its drive method | Oct 25, 1998 | Issued |
Array
(
[id] => 4137713
[patent_doc_number] => 06147394
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-11-14
[patent_title] => 'Method of photolithographically defining three regions with one mask step and self aligned isolation structure formed thereby'
[patent_app_type] => 1
[patent_app_number] => 9/172366
[patent_app_country] => US
[patent_app_date] => 1998-10-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 32
[patent_figures_cnt] => 41
[patent_no_of_words] => 10398
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 360
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/147/06147394.pdf
[firstpage_image] =>[orig_patent_app_number] => 172366
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/172366 | Method of photolithographically defining three regions with one mask step and self aligned isolation structure formed thereby | Oct 13, 1998 | Issued |
| 09/166416 | SEMICONDUCTOR INTEGRATED CIRCUIT WITH TEMPORARILY INTERCONNECTED BOND PADS | Oct 4, 1998 | Abandoned |
Array
(
[id] => 4362727
[patent_doc_number] => 06175145
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-01-16
[patent_title] => 'Method of making a fuse in a semiconductor device and a semiconductor device having a fuse'
[patent_app_type] => 1
[patent_app_number] => 9/163826
[patent_app_country] => US
[patent_app_date] => 1998-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 15
[patent_no_of_words] => 2548
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 154
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/175/06175145.pdf
[firstpage_image] =>[orig_patent_app_number] => 163826
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/163826 | Method of making a fuse in a semiconductor device and a semiconductor device having a fuse | Sep 29, 1998 | Issued |
Array
(
[id] => 4239064
[patent_doc_number] => 06118146
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-09-12
[patent_title] => 'Microelectronic capacitors having tantalum pentoxide dielectrics'
[patent_app_type] => 1
[patent_app_number] => 9/152764
[patent_app_country] => US
[patent_app_date] => 1998-09-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 12
[patent_no_of_words] => 3348
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/118/06118146.pdf
[firstpage_image] =>[orig_patent_app_number] => 152764
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/152764 | Microelectronic capacitors having tantalum pentoxide dielectrics | Sep 13, 1998 | Issued |
Array
(
[id] => 4363327
[patent_doc_number] => 06169294
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-01-02
[patent_title] => 'Inverted light emitting diode'
[patent_app_type] => 1
[patent_app_number] => 9/149260
[patent_app_country] => US
[patent_app_date] => 1998-09-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 1587
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/169/06169294.pdf
[firstpage_image] =>[orig_patent_app_number] => 149260
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/149260 | Inverted light emitting diode | Sep 7, 1998 | Issued |