| Application number | Title of the application | Filing Date | Status |
|---|
Array
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[patent_issue_date] => 1998-02-10
[patent_title] => 'Semiconductor device having capacitior and manufacturing method thereof'
[patent_app_type] => 1
[patent_app_number] => 8/778953
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Array
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[patent_kind] => NA
[patent_issue_date] => 1999-03-09
[patent_title] => 'Programmable interconnect structures and programmable integrated circuits'
[patent_app_type] => 1
[patent_app_number] => 8/768601
[patent_app_country] => US
[patent_app_date] => 1996-12-18
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[firstpage_image] =>[orig_patent_app_number] => 768601
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/768601 | Programmable interconnect structures and programmable integrated circuits | Dec 17, 1996 | Issued |
Array
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[id] => 4243026
[patent_doc_number] => 06144098
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-11-07
[patent_title] => 'Techniques for improving adhesion of silicon dioxide to titanium'
[patent_app_type] => 1
[patent_app_number] => 8/744298
[patent_app_country] => US
[patent_app_date] => 1996-11-06
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/144/06144098.pdf
[firstpage_image] =>[orig_patent_app_number] => 744298
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/744298 | Techniques for improving adhesion of silicon dioxide to titanium | Nov 5, 1996 | Issued |
Array
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[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-01-06
[patent_title] => 'Antifuse structure and method for manufacturing it'
[patent_app_type] => 1
[patent_app_number] => 8/735060
[patent_app_country] => US
[patent_app_date] => 1996-10-18
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[firstpage_image] =>[orig_patent_app_number] => 735060
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/735060 | Antifuse structure and method for manufacturing it | Oct 17, 1996 | Issued |
Array
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[id] => 4137726
[patent_doc_number] => 06147395
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[patent_kind] => NA
[patent_issue_date] => 2000-11-14
[patent_title] => 'Method for fabricating a small area of contact between electrodes'
[patent_app_type] => 1
[patent_app_number] => 8/724816
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[patent_app_date] => 1996-10-02
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[firstpage_image] =>[orig_patent_app_number] => 724816
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/724816 | Method for fabricating a small area of contact between electrodes | Oct 1, 1996 | Issued |
Array
(
[id] => 3727786
[patent_doc_number] => 05682059
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-10-28
[patent_title] => 'Semiconductor device including anti-fuse element and method of manufacturing the device'
[patent_app_type] => 1
[patent_app_number] => 8/712156
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Array
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[id] => 3626191
[patent_doc_number] => 05689133
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-11-18
[patent_title] => 'ESD protection circuit'
[patent_app_type] => 1
[patent_app_number] => 8/709611
[patent_app_country] => US
[patent_app_date] => 1996-09-09
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[pdf_file] => patents/05/689/05689133.pdf
[firstpage_image] =>[orig_patent_app_number] => 709611
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/709611 | ESD protection circuit | Sep 8, 1996 | Issued |
Array
(
[id] => 3702281
[patent_doc_number] => 05677564
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-10-14
[patent_title] => 'Shallow trench isolation in integrated circuits'
[patent_app_type] => 1
[patent_app_number] => 8/736651
[patent_app_country] => US
[patent_app_date] => 1996-08-21
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[pdf_file] => patents/05/677/05677564.pdf
[firstpage_image] =>[orig_patent_app_number] => 736651
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/736651 | Shallow trench isolation in integrated circuits | Aug 20, 1996 | Issued |
Array
(
[id] => 4070072
[patent_doc_number] => 05866938
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-02-02
[patent_title] => 'Semiconductor device equipped with antifuse elements and a method for manufacturing an FPGA'
[patent_app_type] => 1
[patent_app_number] => 8/698349
[patent_app_country] => US
[patent_app_date] => 1996-08-15
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[firstpage_image] =>[orig_patent_app_number] => 698349
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/698349 | Semiconductor device equipped with antifuse elements and a method for manufacturing an FPGA | Aug 14, 1996 | Issued |
Array
(
[id] => 3799701
[patent_doc_number] => 05780918
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-07-14
[patent_title] => 'Semiconductor integrated circuit device having a programmable adjusting element in the form of a fuse mounted on a margin of the device and a method of manufacturing the same'
[patent_app_type] => 1
[patent_app_number] => 8/695975
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[pdf_file] => patents/05/780/05780918.pdf
[firstpage_image] =>[orig_patent_app_number] => 695975
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/695975 | Semiconductor integrated circuit device having a programmable adjusting element in the form of a fuse mounted on a margin of the device and a method of manufacturing the same | Aug 11, 1996 | Issued |
Array
(
[id] => 3980727
[patent_doc_number] => 05917229
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-06-29
[patent_title] => 'Programmable/reprogrammable printed circuit board using fuse and/or antifuse as interconnect'
[patent_app_type] => 1
[patent_app_number] => 8/688241
[patent_app_country] => US
[patent_app_date] => 1996-07-29
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[pdf_file] => patents/05/917/05917229.pdf
[firstpage_image] =>[orig_patent_app_number] => 688241
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/688241 | Programmable/reprogrammable printed circuit board using fuse and/or antifuse as interconnect | Jul 28, 1996 | Issued |
Array
(
[id] => 3736294
[patent_doc_number] => 05693979
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-12-02
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[firstpage_image] =>[orig_patent_app_number] => 677335
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Array
(
[id] => 3799715
[patent_doc_number] => 05780919
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-07-14
[patent_title] => 'Electrically programmable interconnect structure having a PECVD amorphous silicon element'
[patent_app_type] => 1
[patent_app_number] => 8/646823
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[firstpage_image] =>[orig_patent_app_number] => 646823
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/646823 | Electrically programmable interconnect structure having a PECVD amorphous silicon element | May 20, 1996 | Issued |
Array
(
[id] => 3729922
[patent_doc_number] => 05701027
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[patent_kind] => NA
[patent_issue_date] => 1997-12-23
[patent_title] => 'Programmable interconnect structures and programmable integrated circuits'
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[pdf_file] => patents/05/701/05701027.pdf
[firstpage_image] =>[orig_patent_app_number] => 651102
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/651102 | Programmable interconnect structures and programmable integrated circuits | May 20, 1996 | Issued |
Array
(
[id] => 3857531
[patent_doc_number] => 05767553
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-06-16
[patent_title] => 'Flat cell mask ROM having compact select transistor structure'
[patent_app_type] => 1
[patent_app_number] => 8/647645
[patent_app_country] => US
[patent_app_date] => 1996-05-15
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[firstpage_image] =>[orig_patent_app_number] => 647645
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/647645 | Flat cell mask ROM having compact select transistor structure | May 14, 1996 | Issued |
Array
(
[id] => 3732520
[patent_doc_number] => 05652459
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[patent_kind] => NA
[patent_issue_date] => 1997-07-29
[patent_title] => 'Moisture guard ring for integrated circuit applications'
[patent_app_type] => 1
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[patent_app_country] => US
[patent_app_date] => 1996-05-06
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[pdf_file] => patents/05/652/05652459.pdf
[firstpage_image] =>[orig_patent_app_number] => 643715
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/643715 | Moisture guard ring for integrated circuit applications | May 5, 1996 | Issued |
Array
(
[id] => 3857890
[patent_doc_number] => 05767578
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-06-16
[patent_title] => 'Surface mount and flip chip technology with diamond film passivation for total integated circuit isolation'
[patent_app_type] => 1
[patent_app_number] => 8/634957
[patent_app_country] => US
[patent_app_date] => 1996-04-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
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[firstpage_image] =>[orig_patent_app_number] => 634957
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/634957 | Surface mount and flip chip technology with diamond film passivation for total integated circuit isolation | Apr 18, 1996 | Issued |
| 08/625974 | MIXED TECHNOLOGY INTEGRATED DEVICE COMPRISING COMPLEMENTARY LDMOS POWER TRANSISTORS, CMOS AND VERTICAL PNP INTEGRATED STRUCTURES HAVING AN ENHANCED ABILITY TO WITHSTAND A RELATIVELY HIGH SUPPLY VOLTAGE | Mar 31, 1996 | Abandoned |
Array
(
[id] => 3727744
[patent_doc_number] => 05682056
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-10-28
[patent_title] => 'Phase shifting mask and method of manufacturing same'
[patent_app_type] => 1
[patent_app_number] => 8/613766
[patent_app_country] => US
[patent_app_date] => 1996-02-28
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 613766
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/613766 | Phase shifting mask and method of manufacturing same | Feb 27, 1996 | Issued |
| 08/606550 | PROGRAMMABLE ANTI-FUSE DEVICE AND METHOD FOR MANUFACTURING THE SAME | Feb 25, 1996 | Abandoned |