Search

Michael Aaron Pratt

Examiner (ID: 7866, Phone: (571)272-2145 , Office: P/2914 )

Most Active Art Unit
2914
Art Unit(s)
2951, 2914
Total Applications
4747
Issued Applications
4588
Pending Applications
5
Abandoned Applications
161

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4324587 [patent_doc_number] => 06249018 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-19 [patent_title] => 'Fabrication method to approach the conducting structure of a DRAM cell with straightforward bit line' [patent_app_type] => 1 [patent_app_number] => 9/292128 [patent_app_country] => US [patent_app_date] => 1999-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 2503 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/249/06249018.pdf [firstpage_image] =>[orig_patent_app_number] => 292128 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/292128
Fabrication method to approach the conducting structure of a DRAM cell with straightforward bit line Apr 13, 1999 Issued
Array ( [id] => 1544324 [patent_doc_number] => 06373122 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-16 [patent_title] => 'Method of fabricating various-sized passivated integrated circuit chips from a borderless gate array' [patent_app_type] => B1 [patent_app_number] => 09/290495 [patent_app_country] => US [patent_app_date] => 1999-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 1865 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/373/06373122.pdf [firstpage_image] =>[orig_patent_app_number] => 09290495 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/290495
Method of fabricating various-sized passivated integrated circuit chips from a borderless gate array Apr 11, 1999 Issued
Array ( [id] => 4358674 [patent_doc_number] => 06291844 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-18 [patent_title] => 'Semiconductor memory device with an improved layout of programmable fuses' [patent_app_type] => 1 [patent_app_number] => 9/288620 [patent_app_country] => US [patent_app_date] => 1999-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2995 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/291/06291844.pdf [firstpage_image] =>[orig_patent_app_number] => 288620 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/288620
Semiconductor memory device with an improved layout of programmable fuses Apr 8, 1999 Issued
09/280297 SEMICONDUCTOR DEVICE WITH AN ANTI-DOPED REGION Mar 28, 1999 Abandoned
Array ( [id] => 4282022 [patent_doc_number] => 06281519 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-28 [patent_title] => 'Quantum semiconductor memory device including quantum dots' [patent_app_type] => 1 [patent_app_number] => 9/273526 [patent_app_country] => US [patent_app_date] => 1999-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 7204 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/281/06281519.pdf [firstpage_image] =>[orig_patent_app_number] => 273526 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/273526
Quantum semiconductor memory device including quantum dots Mar 21, 1999 Issued
Array ( [id] => 4376384 [patent_doc_number] => 06288418 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-11 [patent_title] => 'Multiuse input/output connector arrangement for graphics accelerator integrated circuit' [patent_app_type] => 1 [patent_app_number] => 9/273012 [patent_app_country] => US [patent_app_date] => 1999-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1995 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/288/06288418.pdf [firstpage_image] =>[orig_patent_app_number] => 273012 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/273012
Multiuse input/output connector arrangement for graphics accelerator integrated circuit Mar 18, 1999 Issued
Array ( [id] => 6458775 [patent_doc_number] => 20020020841 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-02-21 [patent_title] => 'CARBON NANOTUBE DEVICE' [patent_app_type] => new [patent_app_number] => 09/270825 [patent_app_country] => US [patent_app_date] => 1999-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1941 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0020/20020020841.pdf [firstpage_image] =>[orig_patent_app_number] => 09270825 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/270825
Carbon nanotube device Mar 17, 1999 Issued
Array ( [id] => 4360822 [patent_doc_number] => 06201259 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-13 [patent_title] => 'Tunneling magnetoresistance element, and magnetic sensor, magnetic head and magnetic memory using the element' [patent_app_type] => 1 [patent_app_number] => 9/268714 [patent_app_country] => US [patent_app_date] => 1999-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 36 [patent_no_of_words] => 8334 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/201/06201259.pdf [firstpage_image] =>[orig_patent_app_number] => 268714 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/268714
Tunneling magnetoresistance element, and magnetic sensor, magnetic head and magnetic memory using the element Mar 16, 1999 Issued
Array ( [id] => 1404268 [patent_doc_number] => 06531751 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-03-11 [patent_title] => 'Semiconductor device with increased gate insulator lifetime' [patent_app_type] => B1 [patent_app_number] => 09/271084 [patent_app_country] => US [patent_app_date] => 1999-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 5019 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/531/06531751.pdf [firstpage_image] =>[orig_patent_app_number] => 09271084 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/271084
Semiconductor device with increased gate insulator lifetime Mar 16, 1999 Issued
Array ( [id] => 4310082 [patent_doc_number] => 06252272 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-26 [patent_title] => 'Semiconductor device, and method of fabricating the same' [patent_app_type] => 1 [patent_app_number] => 9/267607 [patent_app_country] => US [patent_app_date] => 1999-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 50 [patent_no_of_words] => 9525 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/252/06252272.pdf [firstpage_image] =>[orig_patent_app_number] => 267607 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/267607
Semiconductor device, and method of fabricating the same Mar 14, 1999 Issued
Array ( [id] => 1495449 [patent_doc_number] => 06342711 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-29 [patent_title] => 'Confinement of E-fields in high density ferroelectric memory device structures' [patent_app_type] => B1 [patent_app_number] => 09/264047 [patent_app_country] => US [patent_app_date] => 1999-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 4062 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/342/06342711.pdf [firstpage_image] =>[orig_patent_app_number] => 09264047 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/264047
Confinement of E-fields in high density ferroelectric memory device structures Mar 7, 1999 Issued
Array ( [id] => 4333177 [patent_doc_number] => 06320208 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-20 [patent_title] => 'II-VI compound semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/272737 [patent_app_country] => US [patent_app_date] => 1999-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3900 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/320/06320208.pdf [firstpage_image] =>[orig_patent_app_number] => 272737 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/272737
II-VI compound semiconductor device Mar 7, 1999 Issued
Array ( [id] => 1563032 [patent_doc_number] => 06362495 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-26 [patent_title] => 'Dual-metal-trench silicon carbide Schottky pinch rectifier' [patent_app_type] => B1 [patent_app_number] => 09/264156 [patent_app_country] => US [patent_app_date] => 1999-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 3035 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/362/06362495.pdf [firstpage_image] =>[orig_patent_app_number] => 09264156 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/264156
Dual-metal-trench silicon carbide Schottky pinch rectifier Mar 4, 1999 Issued
Array ( [id] => 4282605 [patent_doc_number] => 06281559 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-28 [patent_title] => 'Gate stack structure for variable threshold voltage' [patent_app_type] => 1 [patent_app_number] => 9/261274 [patent_app_country] => US [patent_app_date] => 1999-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 24 [patent_no_of_words] => 6697 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/281/06281559.pdf [firstpage_image] =>[orig_patent_app_number] => 261274 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/261274
Gate stack structure for variable threshold voltage Mar 2, 1999 Issued
Array ( [id] => 4299486 [patent_doc_number] => 06180956 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-30 [patent_title] => 'Thin film transistors with organic-inorganic hybrid materials as semiconducting channels' [patent_app_type] => 1 [patent_app_number] => 9/261515 [patent_app_country] => US [patent_app_date] => 1999-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 2874 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/180/06180956.pdf [firstpage_image] =>[orig_patent_app_number] => 261515 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/261515
Thin film transistors with organic-inorganic hybrid materials as semiconducting channels Mar 2, 1999 Issued
Array ( [id] => 4376664 [patent_doc_number] => 06288437 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-11 [patent_title] => 'Antifuse structures methods and applications' [patent_app_type] => 1 [patent_app_number] => 9/258363 [patent_app_country] => US [patent_app_date] => 1999-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 4857 [patent_no_of_claims] => 54 [patent_no_of_ind_claims] => 27 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/288/06288437.pdf [firstpage_image] =>[orig_patent_app_number] => 258363 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/258363
Antifuse structures methods and applications Feb 25, 1999 Issued
Array ( [id] => 1581021 [patent_doc_number] => 06423582 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-23 [patent_title] => 'Use of DAR coating to modulate the efficiency of laser fuse blows' [patent_app_type] => B1 [patent_app_number] => 09/257756 [patent_app_country] => US [patent_app_date] => 1999-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 4114 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/423/06423582.pdf [firstpage_image] =>[orig_patent_app_number] => 09257756 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/257756
Use of DAR coating to modulate the efficiency of laser fuse blows Feb 24, 1999 Issued
09/214846 REFERENCE APPARATUS, REFERENCE LEVEL SETTING METHOD, SELF-DIAGNOSIS METHOD AND NONVOLATILE SEMICONDUCTOR MEMORY Feb 22, 1999 Abandoned
Array ( [id] => 4360731 [patent_doc_number] => 06218711 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-17 [patent_title] => 'Raised source/drain process by selective sige epitaxy' [patent_app_type] => 1 [patent_app_number] => 9/253574 [patent_app_country] => US [patent_app_date] => 1999-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1594 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/218/06218711.pdf [firstpage_image] =>[orig_patent_app_number] => 253574 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/253574
Raised source/drain process by selective sige epitaxy Feb 18, 1999 Issued
09/252514 DUAL-COUNTERDOPED CHANNEL FIELD EFFECT TRANSISTOR AND METHOD Feb 17, 1999 Abandoned
Menu