
Michael Aaron Pratt
Examiner (ID: 7866, Phone: (571)272-2145 , Office: P/2914 )
| Most Active Art Unit | 2914 |
| Art Unit(s) | 2951, 2914 |
| Total Applications | 4747 |
| Issued Applications | 4588 |
| Pending Applications | 5 |
| Abandoned Applications | 161 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4282354
[patent_doc_number] => 06281542
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-08-28
[patent_title] => 'Flower-like capacitor structure for a memory cell'
[patent_app_type] => 1
[patent_app_number] => 9/249840
[patent_app_country] => US
[patent_app_date] => 1999-02-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 11
[patent_no_of_words] => 2848
[patent_no_of_claims] => 15
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[patent_words_short_claim] => 193
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/281/06281542.pdf
[firstpage_image] =>[orig_patent_app_number] => 249840
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/249840 | Flower-like capacitor structure for a memory cell | Feb 14, 1999 | Issued |
Array
(
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[patent_doc_number] => 06353234
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-03-05
[patent_title] => 'Layered arrangement and component containing the latter'
[patent_app_type] => B1
[patent_app_number] => 09/242366
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[pdf_file] => patents/06/353/06353234.pdf
[firstpage_image] =>[orig_patent_app_number] => 09242366
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/242366 | Layered arrangement and component containing the latter | Feb 10, 1999 | Issued |
Array
(
[id] => 1500245
[patent_doc_number] => 06486014
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-11-26
[patent_title] => 'Semiconductor device and method of manufacturing the same'
[patent_app_type] => B1
[patent_app_number] => 09/246014
[patent_app_country] => US
[patent_app_date] => 1999-02-04
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[pdf_file] => patents/06/486/06486014.pdf
[firstpage_image] =>[orig_patent_app_number] => 09246014
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/246014 | Semiconductor device and method of manufacturing the same | Feb 3, 1999 | Issued |
Array
(
[id] => 1509210
[patent_doc_number] => 06441395
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-08-27
[patent_title] => 'Column-row addressable electric microswitch arrays and sensor matrices employing them'
[patent_app_type] => B1
[patent_app_number] => 09/241656
[patent_app_country] => US
[patent_app_date] => 1999-02-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
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[patent_no_of_words] => 10445
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/441/06441395.pdf
[firstpage_image] =>[orig_patent_app_number] => 09241656
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/241656 | Column-row addressable electric microswitch arrays and sensor matrices employing them | Feb 1, 1999 | Issued |
Array
(
[id] => 4301048
[patent_doc_number] => 06184557
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-02-06
[patent_title] => 'I/O circuit that utilizes a pair of well structures as resistors to delay an ESD event and as diodes for ESD protection'
[patent_app_type] => 1
[patent_app_number] => 9/239344
[patent_app_country] => US
[patent_app_date] => 1999-01-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
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[pdf_file] => patents/06/184/06184557.pdf
[firstpage_image] =>[orig_patent_app_number] => 239344
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/239344 | I/O circuit that utilizes a pair of well structures as resistors to delay an ESD event and as diodes for ESD protection | Jan 27, 1999 | Issued |
Array
(
[id] => 4355263
[patent_doc_number] => 06215153
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-04-10
[patent_title] => 'MOSFET and method for fabricating the same'
[patent_app_type] => 1
[patent_app_number] => 9/235747
[patent_app_country] => US
[patent_app_date] => 1999-01-25
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[pdf_file] => patents/06/215/06215153.pdf
[firstpage_image] =>[orig_patent_app_number] => 235747
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/235747 | MOSFET and method for fabricating the same | Jan 24, 1999 | Issued |
Array
(
[id] => 4321771
[patent_doc_number] => 06331463
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-12-18
[patent_title] => 'Method for manufacturing low power high efficiency non-volatile erasable programmable memory cell structure'
[patent_app_type] => 1
[patent_app_number] => 9/233375
[patent_app_country] => US
[patent_app_date] => 1999-01-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[pdf_file] => patents/06/331/06331463.pdf
[firstpage_image] =>[orig_patent_app_number] => 233375
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/233375 | Method for manufacturing low power high efficiency non-volatile erasable programmable memory cell structure | Jan 17, 1999 | Issued |
Array
(
[id] => 4373316
[patent_doc_number] => 06274915
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-08-14
[patent_title] => 'Method of improving MOS device performance by controlling degree of depletion in the gate electrode'
[patent_app_type] => 1
[patent_app_number] => 9/225646
[patent_app_country] => US
[patent_app_date] => 1999-01-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
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[patent_no_of_words] => 2421
[patent_no_of_claims] => 8
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[pdf_file] => patents/06/274/06274915.pdf
[firstpage_image] =>[orig_patent_app_number] => 225646
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/225646 | Method of improving MOS device performance by controlling degree of depletion in the gate electrode | Jan 4, 1999 | Issued |
| 09/214294 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME | Jan 3, 1999 | Abandoned |
Array
(
[id] => 1374434
[patent_doc_number] => 06566707
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-05-20
[patent_title] => 'Transistor, semiconductor memory and method of fabricating the same'
[patent_app_type] => B1
[patent_app_number] => 09/223965
[patent_app_country] => US
[patent_app_date] => 1998-12-31
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[patent_drawing_sheets_cnt] => 77
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[pdf_file] => patents/06/566/06566707.pdf
[firstpage_image] =>[orig_patent_app_number] => 09223965
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/223965 | Transistor, semiconductor memory and method of fabricating the same | Dec 30, 1998 | Issued |
Array
(
[id] => 4324524
[patent_doc_number] => 06249013
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-06-19
[patent_title] => 'Microwave-millimeter wave circuit device and method for manufacturing the same'
[patent_app_type] => 1
[patent_app_number] => 9/221167
[patent_app_country] => US
[patent_app_date] => 1998-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
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[pdf_file] => patents/06/249/06249013.pdf
[firstpage_image] =>[orig_patent_app_number] => 221167
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/221167 | Microwave-millimeter wave circuit device and method for manufacturing the same | Dec 27, 1998 | Issued |
Array
(
[id] => 4424752
[patent_doc_number] => 06225678
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-05-01
[patent_title] => 'Layout technique for a matching capacitor array using a continuous top electrode'
[patent_app_type] => 1
[patent_app_number] => 9/221634
[patent_app_country] => US
[patent_app_date] => 1998-12-23
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/225/06225678.pdf
[firstpage_image] =>[orig_patent_app_number] => 221634
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/221634 | Layout technique for a matching capacitor array using a continuous top electrode | Dec 22, 1998 | Issued |
Array
(
[id] => 4289710
[patent_doc_number] => 06235590
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-05-22
[patent_title] => 'Fabrication of differential gate oxide thicknesses on a single integrated circuit chip'
[patent_app_type] => 1
[patent_app_number] => 9/216394
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[pdf_file] => patents/06/235/06235590.pdf
[firstpage_image] =>[orig_patent_app_number] => 216394
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/216394 | Fabrication of differential gate oxide thicknesses on a single integrated circuit chip | Dec 17, 1998 | Issued |
Array
(
[id] => 4147551
[patent_doc_number] => 06031246
[patent_country] => US
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[patent_issue_date] => 2000-02-29
[patent_title] => 'Method of producing semiconductor devices and method of evaluating the same'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/215625 | Method of producing semiconductor devices and method of evaluating the same | Dec 17, 1998 | Issued |
Array
(
[id] => 4422307
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[patent_kind] => NA
[patent_issue_date] => 2001-02-27
[patent_title] => 'Quantum conductive recrystallization barrier layers'
[patent_app_type] => 1
[patent_app_number] => 9/213674
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[firstpage_image] =>[orig_patent_app_number] => 213674
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Array
(
[id] => 4266073
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[firstpage_image] =>[orig_patent_app_number] => 212244
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/212244 | Voltage dividing resistor and voltage dividing circuit | Dec 15, 1998 | Issued |
Array
(
[id] => 4410856
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[patent_title] => 'Transistor and method'
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Array
(
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[patent_title] => 'Non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping'
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[firstpage_image] =>[orig_patent_app_number] => 09211981
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/211981 | Non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping | Dec 13, 1998 | Issued |
Array
(
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[patent_title] => 'Semiconductor topography having improved active device isolation and reduced dopant migration'
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Array
(
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[patent_title] => 'Semiconductor device having a selectively-grown contact pad'
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[pdf_file] => patents/06/313/06313494.pdf
[firstpage_image] =>[orig_patent_app_number] => 203385
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/203385 | Semiconductor device having a selectively-grown contact pad | Dec 1, 1998 | Issued |