
Michael Aaron Pratt
Examiner (ID: 7866, Phone: (571)272-2145 , Office: P/2914 )
| Most Active Art Unit | 2914 |
| Art Unit(s) | 2951, 2914 |
| Total Applications | 4747 |
| Issued Applications | 4588 |
| Pending Applications | 5 |
| Abandoned Applications | 161 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1580341
[patent_doc_number] => 06448631
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2002-09-10
[patent_title] => 'Cell architecture with local interconnect and method for making same'
[patent_app_type] => B2
[patent_app_number] => 09/159264
[patent_app_country] => US
[patent_app_date] => 1998-09-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 38
[patent_figures_cnt] => 63
[patent_no_of_words] => 6870
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/448/06448631.pdf
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Array
(
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[patent_doc_number] => 06150714
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-11-21
[patent_title] => 'Current sense element incorporated into integrated circuit package lead frame'
[patent_app_type] => 1
[patent_app_number] => 9/157284
[patent_app_country] => US
[patent_app_date] => 1998-09-18
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Array
(
[id] => 1386664
[patent_doc_number] => 06555881
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-04-29
[patent_title] => 'Mask ROM cell and method of fabricating the same'
[patent_app_type] => B2
[patent_app_number] => 09/150024
[patent_app_country] => US
[patent_app_date] => 1998-09-09
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/150024 | Mask ROM cell and method of fabricating the same | Sep 8, 1998 | Issued |
Array
(
[id] => 1436513
[patent_doc_number] => 06355940
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-03-12
[patent_title] => 'Display device and semiconductor device having laser annealed semiconductor elements'
[patent_app_type] => B1
[patent_app_number] => 09/148854
[patent_app_country] => US
[patent_app_date] => 1998-09-04
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/148854 | Display device and semiconductor device having laser annealed semiconductor elements | Sep 3, 1998 | Issued |
Array
(
[id] => 4277062
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[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-06-12
[patent_title] => 'System and method for forming a uniform thin gate oxide layer'
[patent_app_type] => 1
[patent_app_number] => 9/146418
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[patent_app_date] => 1998-09-03
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/146418 | System and method for forming a uniform thin gate oxide layer | Sep 2, 1998 | Issued |
Array
(
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[patent_issue_date] => 2001-11-27
[patent_title] => 'Diffusion barrier layers and methods of forming same'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/146866 | Diffusion barrier layers and methods of forming same | Sep 2, 1998 | Issued |
Array
(
[id] => 4333420
[patent_doc_number] => 06320222
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[patent_title] => 'Structure and method for reducing threshold voltage variations due to dopant fluctuations'
[patent_app_type] => 1
[patent_app_number] => 9/144202
[patent_app_country] => US
[patent_app_date] => 1998-09-01
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/320/06320222.pdf
[firstpage_image] =>[orig_patent_app_number] => 144202
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/144202 | Structure and method for reducing threshold voltage variations due to dopant fluctuations | Aug 31, 1998 | Issued |
Array
(
[id] => 1140980
[patent_doc_number] => 06781212
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[patent_issue_date] => 2004-08-24
[patent_title] => 'Selectively doped trench device isolation'
[patent_app_type] => B1
[patent_app_number] => 09/143585
[patent_app_country] => US
[patent_app_date] => 1998-08-31
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/781/06781212.pdf
[firstpage_image] =>[orig_patent_app_number] => 09143585
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/143585 | Selectively doped trench device isolation | Aug 30, 1998 | Issued |
Array
(
[id] => 4310095
[patent_doc_number] => 06252273
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-06-26
[patent_title] => 'Nonvolatile reprogrammable interconnect cell with FN tunneling device for programming and erase'
[patent_app_type] => 1
[patent_app_number] => 9/138838
[patent_app_country] => US
[patent_app_date] => 1998-08-24
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[pdf_file] => patents/06/252/06252273.pdf
[firstpage_image] =>[orig_patent_app_number] => 138838
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/138838 | Nonvolatile reprogrammable interconnect cell with FN tunneling device for programming and erase | Aug 23, 1998 | Issued |
Array
(
[id] => 1462437
[patent_doc_number] => 06350635
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[patent_issue_date] => 2002-02-26
[patent_title] => 'Memory cell having a vertical transistor with buried source/drain and dual gates'
[patent_app_type] => B1
[patent_app_number] => 09/139164
[patent_app_country] => US
[patent_app_date] => 1998-08-24
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[pdf_file] => patents/06/350/06350635.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/139164 | Memory cell having a vertical transistor with buried source/drain and dual gates | Aug 23, 1998 | Issued |
Array
(
[id] => 7643591
[patent_doc_number] => 06429450
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[patent_issue_date] => 2002-08-06
[patent_title] => 'Method of manufacturing a field-effect transistor substantially consisting of organic materials'
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[patent_app_number] => 09/135416
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/135416 | Method of manufacturing a field-effect transistor substantially consisting of organic materials | Aug 16, 1998 | Issued |
Array
(
[id] => 4324457
[patent_doc_number] => 06249010
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[patent_issue_date] => 2001-06-19
[patent_title] => 'Dielectric-based anti-fuse cell with polysilicon contact plug and method for its manufacture'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/135536 | Dielectric-based anti-fuse cell with polysilicon contact plug and method for its manufacture | Aug 16, 1998 | Issued |
Array
(
[id] => 7076924
[patent_doc_number] => 20010040269
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[patent_issue_date] => 2001-11-15
[patent_title] => 'METHOD AND APPARATUS FOR FORMING A JUNCTIONLESS ANTIFUSE'
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Array
(
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Array
(
[id] => 4344849
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Array
(
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Array
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Array
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[firstpage_image] =>[orig_patent_app_number] => 119998
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/119998 | SiC/Si heterostructure semiconductor switch and fabrication thereof | Jul 20, 1998 | Issued |